Yasushi Katayama

According to our database, Yasushi Katayama authored at least 3 papers between 2020 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2022

A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques.

Kazunori Hasebe, Shinichirou Etou, Daisuke Miyazaki, Taiki Iguchi, Yuki Yagishita, Mika Takasaki, Takeru Nogamida, Hiroyuki Watanabe, Tomohiro Matsumoto, Yasushi Katayama

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2020

A 0.5-V BLE Transceiver With a 1.9-mW RX Achieving -96.4-dBm Sensitivity and -27-dBm Tolerance for Intermodulation From Interferers at 6- and 12-MHz Offsets.

Masahisa Tamura, Hideyuki Takano, Hironori Nakahara, Hiroaki Fujita, Naoya Arisaka, Satoru Shinke, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Fumitaka Kondo, Ken Yamamoto, Tomohiro Matsumoto, Yasushi Katayama

IEEE J. Solid State Circuits, 2020

30.5 A 0.5V BLE Transceiver with a 1.9mW RX Achieving -96.4dBm Sensitivity and 4.1dB Adjacent Channel Rejection at 1MHz Offset in 22nm FDSOI.

Masahisa Tamura, Hideyuki Takano, Satoru Shinke, Hiroaki Fujita, Hironori Nakahara, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Yasushi Katayama

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020