Yasunori Dohi

According to our database1, Yasunori Dohi authored at least 7 papers between 1982 and 2012.

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Bibliography

2012
Implementation and evaluation of hyperelastic model for surgical simulator and navigation.
Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

2010
An enhancer of memory and network for applications with large-capacity data and non-continuous data accessing.
J. Supercomput., 2010

2004
A New Memory Module for Memory Intensive Applications.
Proceedings of the 2004 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2004), 2004

1995
A Design of Reed-Solomon Decoder with Systolic Array Structure.
IEEE Trans. Computers, 1995

1992
Improvement of a petri net-controlled multiprocessor system.
Syst. Comput. Jpn., 1992

1983
Architecture of the PSC: A Programmable Systolic Chip
Proceedings of the 10th Annual Symposium on Computer Architecture, 1983, 1983

1982
Hardware sorter and its application to data base machine.
Proceedings of the 9th International Symposium on Computer Architecture (ISCA 1982), 1982


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