Yasunobu Aoki

According to our database, Yasunobu Aoki authored at least 3 papers between 2015 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A 40nm Embedded SG-MONOS Flash Macro for High-end MCU Achieving 200MHz Random Read Operation and 7.91Mb/mm2 Density with Charge Assisted Offset Cancellation Sense Amplifier.

Masaya Nakano, Yoshinobu Kaneda, Koichi Takeda, Takahiro Shimoi, Yasunobu Aoki, Satoru Nakanishi, Yosuke Tashiro, Yasuhiko Taito, Ken Matsubara, Munekatsu Nakagawa, Tomoya Ogawa, Takashi Kurafuji, Hidenori Mitani, Takashi Ito, Takashi Kono

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2019

A 65nm Silicon-on-Thin-Box (SOTB) Embedded 2T-MONOS Flash Achieving 0.22 pJ/bit Read Energy with 64 MHz Access for IoT Applications.

Ken Matsubara, Tsutomu Nagasawa, Yoshinobu Kaneda, Hidenori Mitani, Hiroshi Sato, Takashi Iwase, Yasunobu Aoki, Keiichi Maekawa, Hideaki Yamakoshi, Takashi Ito, Hiroyuki Kondo, Takashi Kono

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2015

Towards modelling of the environmental fate of pharmaceuticals using the QSPR-MM scheme.

Karolina Jagiello, Aleksandra Mostrag-Szlichtyng, Agnieszka Gajewicz, Toru Kawai, Yoshitaka Imaizumi, Takeo Sakurai, Hiroshi Yamamoto, Norihisa Tatarazako, Kaoruko Mizukawa, Yasunobu Aoki, Noriyuki Suzuki, Haruna Watanabe, Tomasz Puzyn

Environ. Model. Softw., 2015