Yasuhiro Take

Affiliations:
  • Keio University, Japan


According to our database1, Yasuhiro Take authored at least 26 papers between 2011 and 2017.

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Bibliography

2017
An image sensor/processor 3D stacked module featuring ThruChip interfaces.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Motion-vector estimation and cognitive classification on an image sensor/processor 3D stacked system featuring ThruChip interfaces.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

Analytical thruchip inductive coupling channel design optimization.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Relay Transmission Thruchip Interface with Low-Skew 3D Clock Distribution Network.
IEICE Trans. Electron., 2015

Through Chip Interface Based Three-Dimensional FPGA Architecture Exploration.
IEICE Trans. Electron., 2015

A Study of Physical Design Guidelines in ThruChip Inductive Coupling Channel.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

Image sensor/digital logic 3D stacked module featuring inductive coupling channels for high speed/low-noise image transfer.
Proceedings of the Symposium on VLSI Circuits, 2015

Circuit and package design for 44GB/s inductive-coupling DRAM/SoC interface.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

Design and analysis for ThruChip design for manufacturing (DFM).
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014
3D NoC with Inductive-Coupling Links for Building-Block SiPs.
IEEE Trans. Computers, 2014

A 352Gb/s inductive-coupling DRAM/SoC interface using overlapping coils with phase division multiplexing and ultra-thin fan-out wafer level package.
Proceedings of the Symposium on VLSI Circuits, 2014

Low-latency wireless 3D NoCs via randomized shortcut chips.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
A Scalable 3D Heterogeneous Multicore with an Inductive ThruChip Interface.
IEEE Micro, 2013

Vertical Link On/Off Regulations for Inductive-Coupling Based Wireless 3-D NoCs.
IEICE Trans. Inf. Syst., 2013

3D clock distribution using vertically/horizontally-coupled resonators.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013

A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface.
Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A case for wireless 3D NoCs for CMPs.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Simultaneous 6-Gb/s Data and 10-mW Power Transmission Using Nested Clover Coils for Noncontact Memory Card.
IEEE J. Solid State Circuits, 2012

CMA-Cube: A scalable reconfigurable accelerator with 3-D wireless inductive coupling interconnect.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

Simultaneous data and power transmission using nested clover coils.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Vertical Link On/Off Control Methods for Wireless 3-D NoCs.
Proceedings of the Architecture of Computing Systems - ARCS 2012 - 25th International Conference, Munich, Germany, February 28, 2012

2011
A 30 Gb/s/Link 2.2 Tb/s/mm <sup>2</sup> Inductively-Coupled Injection-Locking CDR for High-Speed DRAM Interface.
IEEE J. Solid State Circuits, 2011

A vertical bubble flow network using inductive-coupling for 3-D CMPs.
Proceedings of the NOCS 2011, 2011

A 2.7Gb/s/mm<sup>2</sup> 0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011


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