Yasuhiro Agata

According to our database, Yasuhiro Agata authored at least 3 papers between 2000 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2007

A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI.

Yasue Yamamoto, Masanori Shirahama, Toshiaki Kawasaki, Ryuji Nishihara, Shinichi Sumi, Yasuhiro Agata, Hirohito Kikukawa, Hiroyuki Yamauchi

IEICE Trans. Electron., 2007

2005

A 400-MHz random-cycle dual-port interleaved DRAM (D²RAM) with standard CMOS Process.

Masanori Shirahama, Yasuhiro Agata, Toshiaki Kawasaki, Ryuji Nishihara, Wataru Abe, Naoki Kuroda, Hiroyuki Sadakata, Toshitaka Uchikoba, Kazunari Takahashi, Kyoko Egashira, Shinji Honda, Miho Miura, Shin Hashimoto, Hirohito Kikukawa, Hiroyuki Yamauchi

IEEE J. Solid State Circuits, 2005

2000

An 8-ns random cycle embedded RAM macro with dual-port interleaved DRAM architecture (D²/RAM).

Yasuhiro Agata, Kenji Motomochi, Yoshifumi Fukushima, Masanori Shirahama, Marefusa Kurumada, Naoki Kuroda, Hiroyuki Sadakata, Kohtaro Hayashi, Toshio Yamada, Kazunari Takahashi, Tsutomu Fujita

IEEE J. Solid State Circuits, 2000