Yasuhiko Hagihara

According to our database, Yasuhiko Hagihara authored at least 13 papers between 1997 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

Fingertip-Size Optical Module, "Optical I/O Core", and Its Application in FPGA.

Takahiro Nakamura, Kenichiro Yashiki, Kenji Mizutani, Takaaki Nedachi, Junichi Fujikata, Masatoshi Tokushima, Jun Ushida, Masataka Noguchi, Daisuke Okamoto, Yasuyuki Suzuki, Takanori Shimizu, Koichi Takemura, Akio Ukita, Yasuhiro Ibusuki, Mitsuru Kurihara, Keizo Kinoshita, Tsuyoshi Horikawa, Hiroshi Yamaguchi, Junichi Tsuchida, Yasuhiko Hagihara, Kazuhiko Kurata

IEICE Trans. Electron., 2019

2016

25-Gbps/ch Error-Free Operation over 300-m MMF of Low-Power-Consumption Silicon-Photonics-Based Chip-Scale Optical I/O Cores.

Kenichiro Yashiki, Toshinori Uemura, Mitsuru Kurihara, Yasuyuki Suzuki, Masatoshi Tokushima, Yasuhiko Hagihara, Kazuhiko Kurata

IEICE Trans. Electron., 2016

25-Gbps error-free operation of chip-scale Si-photonics optical transmitter over 70°C with integrated quantum dot laser.

Kenichiro Yashiki, Kenji Mizutani, Jun Ushida, Yasuyuki Suzuki, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata, Yasuhiko Hagihara, Kazuhiko Kurata

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

2015

5 mW/Gbps hybrid-integrated Si-photonics-based optical I/O cores and their 25-Gbps/ch error-free operation with over 300-m MMF.

Kenichiro Yashiki, Yasuyuki Suzuki, Yasuhiko Hagihara, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata, Akio Ukita, Koichi Takemura, Takanori Shimizu, Daisuke Okamoto, Jun Ushida, Shigeki Takahashi, Toshinori Uemura, Makoto Okano, Junichi Tsuchida, Takaaki Nedachi, Makoto Fushimi, Ichiro Ogura, Jun Inasaka, Kazuhiko Kurata

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

Optical I/O core transmitter with high tolerance to optical feedback using quantum dot laser.

Kenji Mizutani, Kenichiro Yashiki, Mitsuru Kurihara, Yasuyuki Suzuki, Yasuhiko Hagihara, Nobuaki Hatori, Takanori Shimizu, Yutaka Urino, Takahiro Nakamura, Kazuhiko Kurata, Yasuhiko Arakawa

Proceedings of the European Conference on Optical Communication, 2015

2008

A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations.

Yoshifumi Ikenaga, Masahiro Nomura, Yoetsu Nakazawa, Yasuhiko Hagihara

IEEE J. Solid State Circuits, 2008

2006

A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications.

Koichi Takeda, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake

IEEE J. Solid State Circuits, 2006

Delay and power monitoring schemes for minimizing power consumption by means of supply and threshold voltage control in active and standby modes.

Masahiro Nomura, Yoshifumi Ikenaga, Koichi Takeda, Yoetsu Nakazawa, Yoshiharu Aimoto, Yasuhiko Hagihara

IEEE J. Solid State Circuits, 2006

Domino Logic Synthesis System and its Applications.

Ko Yoshikawa, Shigeto Inui, Yasuhiko Hagihara, Yuichi Nakamura, Takeshi Yoshimura

J. Circuits Syst. Comput., 2006

An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques.

Masahiro Nomura, Taku Ohsawa, Koichi Takeda, Yoetsu Nakazawa, Yoshinori Hirota, Yasuhiko Hagihara, Naoki Nishi

IEICE Trans. Electron., 2006

Redefinition of Write Margin for Next-Generation SRAM and Write-Margin Monitoring Circuit.

Koichi Takeda, Hidetoshi Ikeda, Yasuhiko Hagihara, Masahiro Nomura, Hiroyuki Kobatake

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2004

Timing optimization by replacing flip-flops to latches.

Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

1997

Floating-point datapaths with online built-in self speed test.

Yasuhiko Hagihara, Shigeto Inui, Fuyuki Okamoto, Masato Nishida, Toshihiko Nakamura, Hachiro Yamada

IEEE J. Solid State Circuits, 1997