Yasuaki Nukada

According to our database, Yasuaki Nukada authored at least 4 papers between 1986 and 2001.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2001

An analog front-end chip set employing an electro-optical mixed design on SPICE for 5-Gb/s/ch parallel optical interconnection.

Takeshi Nagahori, Kazunori Miyoshi, Yukio Aizawa, Yuki Kusachi, Yasuaki Nukada, Nobuharu Kami, Naofumi Suzuki

IEEE J. Solid State Circuits, 2001

1989

A single-chip 16-bit 25-ns real-time video/image signal processor.

Katsumi Kikuchi, Yasuaki Nukada, Yasuhiro Aoki, Toshiyuki Kanou, Yukio Endo, Takao Nishitani

IEEE J. Solid State Circuits, December, 1989

1988

An adaptive line equalizer LSI for ISDN subscriber loops.

Daijiro Inami, Yoshiaki Kuraishi, Shigeo Fushimi, Yutaka Takahashi, Yasuaki Nukada, Shigeharu Kameyama, Akihiro Shiratori

IEEE J. Solid State Circuits, June, 1988

1986

A single-chip SC line equalizer system for full duplex multi-bit rate digital transmission.

Kenji Nakayama, Yutaka Takahashi, Yayoi Satoh, Masahiro Naka, Yasuaki Nukada

Proceedings of the IEEE International Conference on Acoustics, 1986