Yasser S. Abdalla

Orcid: 0000-0003-0292-3901

According to our database1, Yasser S. Abdalla authored at least 5 papers between 2012 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
Design of a 3-bit 2.2 ps step 357.5 ps range 0.247 μm2 0.85 μW 45 nm All-MOS delay element.
Integr., 2024

2023
Hybrid Control of the DC Microgrid Using Deep Neural Networks and Global Terminal Sliding Mode Control with the Exponential Reaching Law.
Sensors, December, 2023

2020
A novel flash-like all-metal-oxide semiconductor analog-to-digital converter suitable for system on chips systems.
Int. J. Circuit Theory Appl., 2020

2012
Dynamic random-access memories without sense amplifiers.
Elektrotech. Informationstechnik, 2012

Reduction of short circuit current in static CMOS inverters using novel smart delay generator circuits.
Elektrotech. Informationstechnik, 2012


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