Yasir Ali Shah

According to our database, Yasir Ali Shah authored at least 12 papers between 2015 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Securing the IoT ecosystem: ASIC-based hardware realization of Ascon lightweight cipher.

Safiullah Khan, Kashif Inayat, Fahad Bin Muslim, Yasir Ali Shah, Muhammad Atif Ur Rehman, Ayesha Khalid, Malik Imran, Akmalbek Abdusalomov

Int. J. Inf. Sec., December, 2024

Efficient Soft Core Multiplier for Post Quantum Digital Signatures.

Yasir Ali Shah, Ciara Rafferty, Ayesha Khalid, Safiullah Khan, Khalid Javeed, Máire O'Neill

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

Efficient, Error-Resistant NTT Architectures for CRYSTALS-Kyber FPGA Accelerators.

Safiullah Khan, Ayesha Khalid, Ciara Rafferty, Yasir Ali Shah, Máire O'Neill, Wai-Kong Lee, Seong Oun Hwang

Proceedings of the 31st IFIP/IEEE International Conference on Very Large Scale Integration, 2023

2022

VLCC-Q: Very low computational complexity optical interconnect architecture with queueing for reducing delay and back pressure probability in data center networks.

Mohsin Fayyaz, Yasir Ali Shah, Fayyaz Ahmed, Ghulam Mujtaba

Concurr. Comput. Pract. Exp., 2022

2020

LUT-based high-speed point multiplier for Goldilocks-Curve448.

Yasir Ali Shah, Khalid Javeed, Muhammad Imran Shehzad, Shoaib Azmat

IET Comput. Digit. Tech., 2020

2019

Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor.

Yasir Ali Shah, Khalid Javeed, Shoaib Azmat, Xiaojun Wang

J. Circuits Syst. Comput., 2019

Design and Optimization of Complementary Field Excited Linear Flux Switching Machine With Unequal Primary Tooth Width and Segmented Secondary.

Noman Ullah, Abdul Basit, Faisal Khan, Yasir Ali Shah, Amir Khan, Osama Waheed, Ali Usman

IEEE Access, 2019

2018

High-speed FPGA implementation of full-word Montgomery multiplier for ECC applications.

Safiullah Khan, Khalid Javeed, Yasir Ali Shah

Microprocess. Microsystems, 2018

A high-speed RSD-based flexible ECC processor for arbitrary curves over general prime field.

Yasir Ali Shah, Khalid Javeed, Shoaib Azmat, Xiaojun Wang

Int. J. Circuit Theory Appl., 2018

CAMONET: Moth-Flame Optimization (MFO) Based Clustering Algorithm for VANETs.

Yasir Ali Shah, Hafiz Adnan Habib, Farhan Aadil, Muhammad Fahad Khan, Muazzam Maqsood, Tabassam Nawaz

IEEE Access, 2018

2017

<i>K</i>-means based multiple objects tracking with long-term occlusion handling.

Muhammad Imran Shehzad, Yasir Ali Shah, Zahid Mehmood, Abdul Waheed Malik, Shoaib Azmat

IET Comput. Vis., 2017

2015

A wide range all-digital delay locked loop for video applications.

Muhammad Touqir Pasha, Yasir Ali Shah, J. Jacob Wikner

Proceedings of the European Conference on Circuit Theory and Design, 2015