Yashrajsinh Parmar
According to our database1,
Yashrajsinh Parmar
authored at least 4 papers
between 2018 and 2021.
Collaborative distances:
Collaborative distances:
Timeline
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2021
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Bibliography
2021
A High-Performance VLSI Architecture for a Self-Feedback Convolutional Neural Network.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2020
A Resource-Efficient Multiplierless Systolic Array Architecture for Convolutions in Deep Networks.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
2018
IET Circuits Devices Syst., 2018
Hardware-Efficient Velocity Estimation of Dynamic Obstacles Based on a Novel Radix-4 CORDIC and FPGA Implementation.
Proceedings of the IECON 2018, 2018