Yasaswy Kasarabada

According to our database, Yasaswy Kasarabada authored at least 6 papers between 2017 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of two.

2020

StateLock: State Transition Based Logic Locking for Sequential Circuits.

Yasaswy Kasarabada, Ranga Vemuri

Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

SLED: Sequential Logic Encryption Using Dynamic Keys.

Yasaswy Kasarabada, Vaishali Muralidharan, Ranga Vemuri

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019

Deep State Encryption for Sequential Logic Circuits.

Yasaswy Kasarabada, Sudheer Ram Thulasi Raman, Ranga Vemuri

Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

On SAT-Based Attacks On Encrypted Sequential Logic Circuits.

Yasaswy Kasarabada, Suyuan Chen, Ranga Vemuri

Proceedings of the 20th International Symposium on Quality Electronic Design, 2019

Trust in IoT Devices: A Logic Encryption Perspective.

Yasaswy Kasarabada, David M. Luria, Ranga Vemuri

Proceedings of the Internet of Things. A Confluence of Many Disciplines, 2019

2017

Hardware implementation of the Baillie-PSW primality test.

Carla Purdy, Yasaswy Kasarabada, George B. Purdy

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017