Yarallah Koolivand

Orcid: 0000-0002-3466-8768

According to our database1, Yarallah Koolivand authored at least 17 papers between 2004 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
A Reconfigurable, Nonlinear, Low-Power, VCO-Based ADC for Neural Recording Applications.
Sensors, October, 2024

A 69MHz-Bandwidth 40V/μ s-Slew-Rate 3n V/√Hz-Noise 4.5 μ V-Offset Chopper Operational Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., July, 2024

A 65nm 3mA 0.14-m-Accuracy TDR Based Leak Detection SoC for District Heating Networks with I/C Calibration Technique.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023
A 4.5 $\mu$W Miniaturized 3-Channel Wireless Intra-Cardiac Acquisition System.
IEEE Trans. Biomed. Circuits Syst., October, 2023

Multipolar Stimulator for DBS Application with Concurrent Imbalance Compensation.
Proceedings of the 30th IEEE International Conference on Electronics, Circuits and Systems, 2023

A 69MHz-Bandwidth 40V/μs-Slew-rate 3nV/√Hz-Noises 4.5μV-Offset Chopper Operational Amplifier.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023

2022
Pulse-Based, Multi-Beam Optical Link for Data Telemetry to Implantable Biomedical Microsystems.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

2009
Low voltage low power techniques in design of zero IF CMOS receivers.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2008
New technique in design of active rf cmos mixers for low flicker noise and high conversion gain.
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008

2006
Nonlinearity Analysis in ISD CMOS LNA's Using Volterra Series.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2005
A 2/5mW CMOS Delta Sigma modulator employed in an improved GSM/UMTS receiver structure.
IEICE Electron. Express, 2005

A complete analysis of noise in inductively source degenerated CMOS LNA's.
IEICE Electron. Express, 2005

Design of a Band-Pass Pseudo-2-Path Switched Capacitor Ladder Filter.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A low-power ΣΔ modulator with low capacitor spread for multi-standard receiver applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A new technique for design CMOS LNA for multi-standard receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A two-stage genetic algorithm method for optimization the Sigma-Delta modulators.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Modeling of polysilicide gate resistance effect on inverter delay and power consumption using distributed RC method and branching technique.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004


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