Yao-Yi Yang

According to our database1, Yao-Yi Yang authored at least 13 papers between 2009 and 2013.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2013
Power Management With a Low-Ripple High-Conversion-Ratio 80-V Output Voltage Boost Converter for Avalanche Photodiode System.
IEEE Trans. Ind. Electron., 2013

2012
A Battery-Free 217 nW Static Control Power Buck Converter for Wireless RF Energy Harvesting With ά-Calibrated Dynamic On/Off Time and Adaptive Phase Lead Control.
IEEE J. Solid State Circuits, 2012

An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter.
IEEE J. Solid State Circuits, 2012

A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance.
Proceedings of the Symposium on VLSI Circuits, 2012

Non-invasion power monitoring with 120% harvesting energy improvement by maximum power extracting control for high sustainability power meter system.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Interleaving Energy-Conservation Mode (IECM) Control in Single-Inductor Dual-Output (SIDO) Step-Down Converters With 91% Peak Efficiency.
IEEE J. Solid State Circuits, 2011

Minimized Transient and Steady-State Cross Regulation in 55-nm CMOS Single-Inductor Dual-Output (SIDO) Step-Down DC-DC Converter.
IEEE J. Solid State Circuits, 2011

A battery-free energy harvesting system with the switch capacitor sampler (SCS) technique for high power factor in smart meter applications.
Proceedings of the IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011

A 80V output voltage boost converter with low voltage ripple for Avalanche Photodiode(APD).
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Current-mode synthetic control (CSC) technique for high efficiency DC-DC boost converters over a wide load range.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

55nm CMOS 12-bit 250MHz digital-to-analog converter with dynamic voltage scaling (DVS) technique through single-inductor dual-output (SIDO) converter.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
A DVS Embedded Power Management for High Efficiency Integrated SoC in UWB System.
IEEE J. Solid State Circuits, 2010

2009
A high efficiency and compact size 65nm power management module with 1.2v low-voltage PWM controller for UWB system application.
Proceedings of the 35th European Solid-State Circuits Conference, 2009


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