Yann Kieffer
Orcid: 0000-0001-5904-0515
According to our database1,
Yann Kieffer
authored at least 22 papers
between 2003 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Proposal of a lightweight differential power analysis countermeasure method on elliptic curves for low-cost devices.
Multim. Tools Appl., September, 2024
Securing Elapsed Time for Blockchain: Proof of Hardware Time and Some of its Physical Threats.
Proceedings of the 27th Euromicro Conference on Digital System Design, 2024
Embedded Elapsed Time Techniques in Trusted Execution Environment for Lightweight Blockchain.
Proceedings of the IEEE International Conference on Blockchain, 2024
2023
Low-cost Low-Power Implementation of Binary Edwards Curve for Secure Passive RFID Tags.
Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023
2022
Minimizing makespan under data prefetching constraints for embedded vision systems: a study of optimization methods and their performance.
Oper. Res., 2022
2021
Survey: Vulnerability Analysis of Low-Cost ECC-Based RFID Protocols against Wireless and Side-Channel Attacks.
Sensors, 2021
IEEE Access, 2021
2020
An Experimental Study on Symmetry Breaking Constraints Impact for the One Dimensional Bin-Packing Problem.
Proceedings of the 2020 Federated Conference on Computer Science and Information Systems, 2020
New Symmetry-less ILP Formulation for the Classical One Dimensional Bin-Packing Problem.
Proceedings of the Computing and Combinatorics - 26th International Conference, 2020
2016
Proceedings of the 11th IEEE Symposium on Industrial Embedded Systems, 2016
Formulation and Practical Solution for the Optimization of Memory Accesses in Embedded Vision Systems.
Proceedings of the 2016 Federated Conference on Computer Science and Information Systems, 2016
Memory management in embedded vision systems: Optimization problems and solution methods.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016
2015
Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015
2013
Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods.
Proceedings of the VLSI-SoC: At the Crossroads of Emerging Trends, 2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013
Proceedings of the 18th IEEE European Test Symposium, 2013
2012
A Graph-Based Approach to Optimal Scan Chain Stitching Using RTL Design Descriptions.
VLSI Design, 2012
2011
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011
Proceedings of the 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 2011
Proceedings of the 20th IEEE Asian Test Symposium, 2011
2010
Proceedings of the 15th European Test Symposium, 2010
2003