Yanhang Chen

Orcid: 0000-0003-2282-3940

According to our database1, Yanhang Chen authored at least 9 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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On csauthors.net:

Bibliography

2024
The Error Analysis of Bit Weight Self-Calibration Methods for High-Resolution SAR ADCs.
IEEE Trans. Very Large Scale Integr. Syst., November, 2024

An Injection-Locked and Sub-Sampling Clock Multiplier With a Two-Step SC DAC Achieving 2.67% Jitter Variation.
IEEE Trans. Very Large Scale Integr. Syst., October, 2024

An 8-MS/s 16-bit SAR ADC With Symmetric Complementary Switching and Split Passive Reference Segmentation in 180-nm Process.
IEEE Trans. Circuits Syst. I Regul. Pap., October, 2024

A 16-bit 4-MS/s SAR ADC With Dual-Segmental Bit Weight Self-Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2024

An Efficient 1.4-GS/s 10-bit Timing-Skew-Free Time-Interleaved SAR ADC With a Centralized Sampling Frontend.
IEEE Trans. Very Large Scale Integr. Syst., July, 2024

A 16b 5MS/s 93.7dB-SNDR SAR ADC with a Split Sampling Technique and SRM-Assisted Self-Calibration.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023
Solving Injection Molding Production Cost Problem Based on Combined Group Role Assignment with Costs.
Proceedings of the Web Information Systems Engineering - WISE 2023, 2023

2021
A 42nA I<sub>Q</sub>, 1.5-6V V<sub>IN</sub>, Self-Regulated CMOS Voltage Reference With -93dB PSR at 10 Hz for Energy Harvesting Systems.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

An Integrated Piezoelectric Energy Harvesting Interface Circuit with Adaptive S3BF Control.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021


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