Yang Song
Affiliations:- Waseda University, Graduate School of Information, Production and Systems, Kitakyushu City, Japan
According to our database1,
Yang Song
authored at least 33 papers
between 2005 and 2014.
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Bibliography
2014
Linear Rate Estimation Model for HEVC RDO Using Binary Classification Based Regression.
Proceedings of the Data Compression Conference, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Fast prediction mode decision with hadamard transform based rate-distortion cost estimation for HEVC intra coding.
Proceedings of the IEEE International Conference on Image Processing, 2013
2009
IEEE J. Solid State Circuits, 2009
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009
2008
A Hardware Architecture of CABAC Encoding and Decoding with Dynamic Pipeline for H.264/AVC.
J. Signal Process. Syst., 2008
Motion Feature and Hadamard Coefficient-Based Fast Multiple Reference Frame Motion Estimation for H.264.
IEEE Trans. Circuits Syst. Video Technol., 2008
Exploring Partitions Based on Search Space Smoothing for Heterogeneous Multiprocessor System.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Fast Custom Instruction Identification Algorithm Based on Basic Convex Pattern Model for Supporting ASIP Automated Design.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Parallel Improved HDTV720p Targeted Propagate Partial SAD Architecture for Variable Block Size Motion Estimation in H.264/AVC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Adaptive Search Range Algorithms for Variable Block Size Motion Estimation in H.264/AVC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008
Automated Specific Instruction Customization Methodology for Multimedia Processor Acceleration.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Hardware-oriented direction-based fast fractional motion estimation algorithm in H.264/AVC.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008
Proceedings of the 18th ACM Great Lakes Symposium on VLSI 2008, 2008
2007
Low-Power Partial Distortion Sorting Fast Motion Estimation Algorithms and VLSI Implementations.
IEICE Trans. Inf. Syst., 2007
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007
H.264/AVC Fractional Motion Estimation Engine with Computation Reusing in HDTV1080P Real-Time Encoding Applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
32-Parallel SAD Tree Hardwired Engine for Variable Block Size Motion Estimation in HDTV1080P Real-Time Encoding Application.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007
An Irregular Search Window Reuse Scheme for Motion Estimation in MPEG-2 to H.264 Transcoding.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Enhanced Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
Ultra Low-Complexity Fast Variable Block Size Motion Estimation Algorithm in H.264/AVC.
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007
VLSI Oriented Fast Multiple Reference Frame Motion Estimation Algorithm for H.264/AVC.
Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, 2007
Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007
VLSI friendly edge gradient detection based multiple reference frames motion estimation optimization for H.264/AVC.
Proceedings of the 15th European Signal Processing Conference, 2007
2006
A VLSI Architecture for Variable Block Size Motion Estimation in H.264/AVC with Low Cost Memory Organization.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006
A Fine-Grain Scalable and Low Memory Cost Variable Block Size Motion Estimation Architecture for H.264/AVC.
IEICE Trans. Electron., 2006
System-in-silicon architecture and its application to H.264/AVC motion estimation for 1080HDTV.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006
Low-Pass Filter Based Vlsi Oriented Variable Block Size Motion Estimation Algorithm for H.264.
Proceedings of the 2006 IEEE International Conference on Acoustics Speech and Signal Processing, 2006
Enhanced Partial Distortion Sorting Fast Motion Estimation Algorithm for Low-Power Applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006
2005
A VLSI Array Processing Oriented Fast Fourier Transform Algorithm and Hardware Implementation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005