Yang Jiang
Orcid: 0000-0003-2577-4259Affiliations:
- University of Macau, State Key Laboratory of Analog and Mixed-Signal VLSI, China
According to our database1,
Yang Jiang
authored at least 42 papers
between 2010 and 2024.
Collaborative distances:
Collaborative distances:
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on orcid.org
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Bibliography
2024
A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction.
IEEE J. Solid State Circuits, October, 2024
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics.
IEEE J. Solid State Circuits, September, 2024
A 93.4% Peak Efficiency C<sub>LOAD</sub>-Free Multi-Phase Switched-Capacitor DC-DC Converter Achieving a Fast DVS up to 222.5 mV/ns.
IEEE J. Solid State Circuits, June, 2024
A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime Control.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and C<sub>OUT</sub>-Free Operations.
IEEE J. Solid State Circuits, April, 2024
A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm<sup>2</sup> On-Chip Bootstrap Driving Density.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024
28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°C.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm<sup>3</sup>Density.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2024
2023
A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced I<sub>L</sub> Reduction for 12 V/24 V Inputs.
IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023
IEEE Trans. Circuits Syst. I Regul. Pap., September, 2023
A 0.05-to-3.1A 585mA/mm<sup>3</sup> 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free Operation.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm<sup>2</sup>.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm<sup>2</sup> Peak Current Density.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery.
IEEE J. Solid State Circuits, 2022
Modelling and Analysis of ΔΣ-Modulation-Based Output Spectrum Spur Reduction in Dual-Path Hybrid DC-DC Converters.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022
Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022
A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022
Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot.
Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2022
2021
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2021
A High-Efficiency Dual-Antenna RF Energy Harvesting System Using Full-Energy Extraction With Improved Input Power Response.
IEEE Open J. Circuits Syst., 2021
A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching.
IEICE Electron. Express, 2021
A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range.
IEICE Electron. Express, 2021
Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections With <0.83% Bit-Error Rate.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 mA Output Current.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Algebraic Series-Parallel-Based Switched-Capacitor DC-DC Boost Converter With Wide Input Voltage Range and Enhanced Power Density.
IEEE J. Solid State Circuits, 2019
A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2018
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters.
IEEE J. Solid State Circuits, 2018
A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm<sup>2</sup>.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
2013
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013
2012
Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012
A 10MHz BW 78dB DR CT ΣΔ modulator with novel switched high linearity VCO-based quantizer.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2012
2010
A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators.
Proceedings of the 17th IEEE International Conference on Electronics, 2010
A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010