Yan Ying

According to our database1, Yan Ying authored at least 6 papers between 2010 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2014
A 16-Core Processor With Shared-Memory and Message-Passing Communications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

2012
An 800MHz 320mW 16-core processor with message-passing and shared-memory inter-core communication mechanisms.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

A pure software ldpc decoder on a multi-core processor platform with reduced inter-processor communication cost.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2011
A 4.32 mm<sup>2</sup> 170mW LDPC decoder in 0.13μm CMOS for WiMax/Wi-Fi applications.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
A Cost-Efficient LDPC Decoder for DVB-S2 with the Solution to Address Conflict Issue.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010

A scalable and fault-tolerant routing algorithm for NoCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010


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