Yan-Chao Huang

According to our database, Yan-Chao Huang authored at least 2 papers between 2001 and 2002.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2002

Design of high-performance CMOS priority encoders and incrementer/decrementers using multilevel lookahead and multilevel folding techniques.

Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang

IEEE J. Solid State Circuits, 2002

2001

A high-speed CMOS incrementer/decrementer.

Chung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001