Yamuna Rajasekhar

According to our database1, Yamuna Rajasekhar authored at least 9 papers between 2008 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
New web-based learning content for core programming concepts using Coral.
Proceedings of the IEEE Frontiers in Education Conference, 2019

Student Usage of Interactive Learning Tools in an Online Linear Circuit Analysis Textbook.
Proceedings of the IEEE Frontiers in Education Conference, 2019

2014
Architecture and applications for an All-FPGA parallel computer.
Clust. Comput., 2014

2013
A Novel Memory Subsystem and Computational Model for Parallel Reconfigurable Architectures.
Proceedings of the Euro-Par 2013: Parallel Processing Workshops, 2013

2012
Exploring hardware work queue support for lightweight threads in MPSoCs.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

An Extensible and Portable Tool Suite for Managing Multi-Node FPGA Systems.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
A Radix Tree Router for Scalable FPGA Networks.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2008
Teaching FPGA system design via a remote laboratory facility.
Proceedings of the FPL 2008, 2008

FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs.
Proceedings of the 16th IEEE International Symposium on Field-Programmable Custom Computing Machines, 2008


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