Yamilka Toca-Díaz

According to our database, Yamilka Toca-Díaz authored at least 5 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Flip-and-Patch: A fault-tolerant technique for on-chip memories of CNN accelerators at low supply voltage.

Yamilka Toca-Díaz, Reynier Hernández Palacios, Ruben Gran Tejero, Alejandro Valero

Microprocess. Microsystems, 2024

Shift-and-Safe: Addressing permanent faults in aggressively undervolted CNN accelerators.

Yamilka Toca-Díaz, Ruben Gran Tejero, Alejandro Valero

J. Syst. Archit., 2024

Ensuring the Accuracy of CNN Accelerators Supplied at Ultra-Low Voltage.

Yamilka Toca-Díaz, Ruben Gran Tejero, Alejandro Valero

Proceedings of the 42nd IEEE International Conference on Computer Design, 2024

2023

On Fault-Tolerant Microarchitectural Techniques for Voltage Underscaling in On-Chip Memories of CNN Accelerators.

Yamilka Toca-Díaz, Nicolás Landeros Muñoz, Ruben Gran Tejero, Alejandro Valero

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2021

RRCD: Redirección de Registros Basada en Compresión de Datos para Tolerar FallosPermanentes en una GPU.

Yamilka Toca-Díaz, Alejandro Valero, Ruben Gran Tejero, Darío Suárez Gracia

CoRR, 2021