Y. Serhan Gener

Orcid: 0000-0002-8163-1191

According to our database1, Y. Serhan Gener authored at least 5 papers between 2017 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
Lossless Look-Up Table Compression for Hardware Implementation of Transcendental Functions.
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019

Semi- and Fully-Random Access LUTs for Smooth Functions.
Proceedings of the VLSI-SoC: New Technology Enabler, 2019

SecChisel Framework for Security Verification of Secure Processor Architectures.
Proceedings of the 8th International Workshop on Hardware and Architectural Support for Security and Privacy, 2019

2017
Hardware Division by Small Integer Constants.
IEEE Trans. Computers, 2017

SecChisel: Language and Tool for Practical and Scalable Security Verification of Security-Aware Hardware Architectures.
IACR Cryptol. ePrint Arch., 2017


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