Xun Jiang

According to our database, Xun Jiang authored at least 6 papers between 2022 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

PDNNet: PDN-Aware GNN-CNN Heterogeneous Network for Dynamic IR Drop Prediction.

Yuxiang Zhao, Zhuomin Chai, Xun Jiang, Yibo Lin, Runsheng Wang, Ru Huang

CoRR, 2024

First Experimental Demonstration of Self-Aligned Flip FET (FFET): A Breakthrough Stacked Transistor Technology with 2.5T Design, Dual-Side Active and Interconnects.

Haoran Lu, Yandong Ge, Xun Jiang, Jiacheng Sun, Wanyue Peng, Rui Guo, Ming Li, Yibo Lin, Runsheng Wang, Heng Wu, Ru Huang

Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

CircuitNet 2.0: An Advanced Dataset for Promoting Machine Learning Innovations in Realistic Chip Design Environment.

Xun Jiang, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang

Proceedings of the Twelfth International Conference on Learning Representations, 2024

2023

Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms.

Xun Jiang, Zizheng Guo, Zhuomin Chai, Yuxiang Zhao, Yibo Lin, Runsheng Wang, Ru Huang

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism.

Zizheng Guo, Zuodong Zhang, Xun Jiang, Wuxi Li, Yibo Lin, Runsheng Wang, Ru Huang

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

FPGA-Accelerated Maze Routing Kernel for VLSI Designs.

Xun Jiang, Jiarui Wang, Yibo Lin, Zhongfeng Wang

Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022