Xueyong Zhang
Orcid: 0000-0002-6537-1430
According to our database1,
Xueyong Zhang
authored at least 13 papers
between 2018 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
A 1.35-ppm/°C Temperature Coefficient, 86-dB PSR Voltage Reference With 1-mA Load Driving Capability.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
Time-based Sensing with Linear Current-to-Time Conversion for Multi-level Resistive Memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024
2023
A 915-1220 TOPS/W, 976-1301 GOPS Hybrid In-Memory Computing Based Always-On Image Processing for Neuromorphic Vision Sensors.
IEEE J. Solid State Circuits, March, 2023
IEEE Trans. Circuits Syst. I Regul. Pap., January, 2023
IET Image Process., 2023
Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive Memory.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023
Sound Source Identification Combining Compressed Sensing Sparse Sampling and Equivalent Source Method.
Proceedings of the 28th International Conference on Automation and Computing, 2023
2022
A 915-1220 TOPS/W Hybrid In-Memory Computing based Image Restoration and Region Proposal Integrated Circuit for Neuromorphic Vision Sensors in 65nm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
Spiking Neural Network Integrated Circuits: A Review of Trends and Future Directions.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2021
A 0.11-0.38 pJ/cycle Differential Ring Oscillator in 65 nm CMOS for Robust Neurocomputing.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021
2020
CRAM: Collocated SRAM and DRAM With In-Memory Computing-Based Denoising and Filling for Neuromorphic Vision Sensors in 65 nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
Multi-Channel FSK Inter/Intra-Chip Communication by Exploiting Field-Confined Slow-Wave Transmission Line.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2018
Current Mirror Array: A Novel Circuit Topology for Combining Physical Unclonable Function and Machine Learning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2018