Xuecheng Zou

Orcid: 0000-0002-6404-5270

According to our database1, Xuecheng Zou authored at least 110 papers between 2002 and 2024.

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Bibliography

2024
A Low-Phase-Noise Wide-Tuning-Range Mode-Switching Oscillator Using Multi-Magnetic-Coupling and Active-Source-Degenerating Techniques.
IEEE J. Solid State Circuits, September, 2024

A Chip-PCB Hybrid SC PUF Used for Anti-Desoldering and Depackaging-Attack Protection.
IEEE J. Solid State Circuits, July, 2024

A 206.4 dBc/Hz FoMT Class-F23 VCO using nonlinear-capacitance-transforming technique.
Microelectron. J., 2024

A Fractional-N DTC-based ADPLL using path-select multi-delay line TDC and true fractional division technique.
Microelectron. J., 2024

2023
A 3.83-5.55 GHz high frequency resolution DCO with optimized switched-capacitor ladder and low-coupled eight-shaped transformer.
Int. J. Circuit Theory Appl., December, 2023

ML-Accelerated Yield Analysis Framework Using Regularization for Sparsity in High-Sigma and High-Dimensional Scenarios.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023

Fractional Spurs Reduction Technique Using Probability Density Shaping Sigma-Delta Modulator and Fractional Frequency Divider.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023

A Flexible and High-Performance Lattice-Based Post-Quantum Crypto Secure Coprocessor.
IEEE Trans. Ind. Informatics, 2023

Flexible and Efficient Implementation of CRYSTALS-KYBER SIMD RISC-V Coprocessor Based on Customized Vector Instruction-Set Extension.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023

2022
An Efficient Unstructured Sparse Convolutional Neural Network Accelerator for Wearable ECG Classification Device.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An Energy-Efficient SIFT Based Feature Extraction Accelerator for High Frame-Rate Video Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Design and Analysis of Area and Energy Efficient Reconfigurable Cryptographic Accelerator for Securing IoT Devices.
Sensors, 2022

Efficient Hardware Accelerator Design of Non-Linear Optimization Correlative Scan Matching Algorithm in 2D LiDAR SLAM for Mobile Robots.
Sensors, 2022

Efficient hardware design of a deep U-net model for pixel-level ECG classification in healthcare device.
Microelectron. J., 2022

A 45MHz-2.5GHz broadband CMOS up-conversion mixer with a bisymmetric class-AB input stage.
IEICE Electron. Express, 2022

2021
A SC PUF Standard Cell Used for Key Generation and Anti-Invasive-Attack Protection.
IEEE Trans. Inf. Forensics Secur., 2021

Efficient Hardware Architecture of Convolutional Neural Network for ECG Classification in Wearable Healthcare Device.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

An accurate ISF-based analysis and simulation method for phase noise in LC/Ring oscillators.
Microelectron. J., 2021

A 0.20-2.43 GHz fractional-N frequency synthesizer with optimized VCO and reduced current mismatch CP.
Frontiers Inf. Technol. Electron. Eng., 2021

An FPGA-based accelerator for deep neural network with novel reconfigurable architecture.
IEICE Electron. Express, 2021

Controlled nano-cracking actuated by an in-plane voltage.
Sci. China Inf. Sci., 2021

Linear Equivalent Model for VHF Class Φ<sub>2</sub> Inverter Based on Spectrum Quantification Method to Reduce GaN Reverse Conduction Loss.
IEEE Access, 2021

Towards Efficient Hardware Implementation of NTT for Kyber on FPGAs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Reconfigurable Matrix Multiplication Coprocessor with High Area and Energy Efficiency for Visual Intelligent and Autonomous Mobile Robots.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021

2020
A 0.045- to 2.5-GHz Frequency Synthesizer With TDC-Based AFC and Phase Switching Multi-Modulus Divider.
IEEE Trans. Circuits Syst., 2020

A wideband low-jitter PLL with an optimized Ring-VCO.
IEICE Electron. Express, 2020

A 500-2500 MHz fully integrated CMOS power amplifier with multilayer series inductors.
IEICE Electron. Express, 2020

A 45-2500 MHz high efficiency power amplifier with novel adaptive bias technique.
IEICE Electron. Express, 2020

2019
Superposed Compensation Strategy to Optimize Load/Line Transient Response and Reference Tracking for Discontinuous Conduction Mode Boost Converter.
IEEE Trans. Ind. Informatics, 2019

ARCE: Towards Code Pointer Integrity on Embedded Processors Using Architecture-Assisted Run-Time Metadata Management.
IEEE Comput. Archit. Lett., 2019

A Fully Integrated HF RFID Tag Chip With LFSR-based Light-weight Tripling Mutual Authentication Protocol.
IEEE Access, 2019

2018
Scalable and Parameterized Architecture for Efficient Stream Mining.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

Design Exploration of SHA-3 ASIP for IoT on a 32-bit RISC-V Processor.
IEICE Trans. Inf. Syst., 2018

A Time-Division-Multiplexing Scheme for Simultaneous Wavelength Locking of Multiple Silicon Micro-Rings.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Anodic Electrode Displacement Affect the Efficiency of Transcranial Direct Current Stimulation: a Modeling Study on the Electrode Sizes.
Proceedings of the IEEE International Conference on Cyborg and Bionic Systems, 2018

2017
Chaotic Encrypted Polar Coding Scheme for General Wiretap Channel.
IEEE Trans. Very Large Scale Integr. Syst., 2017

An Efficient and Flexible Hardware Implementation of the Dual-Field Elliptic Curve Cryptographic Processor.
IEEE Trans. Ind. Electron., 2017

Design Considerations of Charge Pump for Antenna Switch Controller With SOI CMOS Technology.
IEEE Trans. Circuits Syst. II Express Briefs, 2017

A Low Power Low Phase Noise Oscillator for MICS Transceivers.
Sensors, 2017

QLC NAND study and enhanced Gray coding methods for sixteen-level-based program algorithms.
Microelectron. J., 2017

A Low-Cost RFID Regulator Insensitive to Temperature and Supply Voltage Variations.
J. Circuits Syst. Comput., 2017

Analysis and measurement of misalignment effect in inductive-coupling wireless inter-chip connection.
IEICE Electron. Express, 2017

A single phase modulation for pulse-based inductive-coupling connection in 3D stacked chip.
IEICE Electron. Express, 2017

An ultra-low power low cost LDO for UHF RFID tag.
IEICE Electron. Express, 2017

A novel positive-feedback read scheme with tail current source of STT-MRAM.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A Novel Thyristor-Based Silicon Physical Unclonable Function.
IEEE Trans. Very Large Scale Integr. Syst., 2016

Digital Sensorless Current Mode Control Based on Charge Balance Principle and Dual Current Error Compensation for DC-DC Converters in DCM.
IEEE Trans. Ind. Electron., 2016

A Nonlinearity-Compensated All-MOS Voltage-to-Current Converter.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

A Low-Cost Low-Power Ring Oscillator-Based Truly Random Number Generator for Encryption on Smart Cards.
IEEE Trans. Circuits Syst. II Express Briefs, 2016

BFWindow: Speculatively Checking Data Property Consistency against Buffer Overflow Attacks.
IEICE Trans. Inf. Syst., 2016

A low phase noise wideband VCO with 8-shaped inductor.
Proceedings of the International Symposium on Integrated Circuits, 2016

A 0.2-2.5 GHz CMOS power amplifier using transformer-based broadband matching network.
Proceedings of the International Symposium on Integrated Circuits, 2016

Chaos embedded polar coding for wiretap channel in negative secrecy capacity case.
Proceedings of the 9th International Congress on Image and Signal Processing, 2016

Implementation of a resource-constrained ECC processor with power analysis countermeasure.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2015
Design and Implementation of An ECC-Based Digital Baseband Controller for RFID Tag Chip.
IEEE Trans. Ind. Electron., 2015

An Invasive-Attack-Resistant PUF Based On Switched-Capacitor Circuit.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A High Sensitivity Analog Front-end Circuit for Semi-Passive HF RFID Tag Applied to Implantable Devices.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

A Sensorless Predictive Current Controlled Boost Converter by Using an EKF with Load Variation Effect Elimination Function.
Sensors, 2015

PUFKEY: A High-Security and High-Throughput Hardware True Random Number Generator for Sensor Networks.
Sensors, 2015

A 2.45-GHz W-level output power CMOS power amplifier with adaptive bias and integrated diode linearizer.
Microelectron. J., 2015

A 2/3 Dual-Modulus Prescaler Using Complementary Clocking NMOS-Like Blocks.
J. Circuits Syst. Comput., 2015

Hardware IP Protection through Gate-Level Obfuscation.
Proceedings of the 14th International Conference on Computer-Aided Design and Computer Graphics, 2015

A 1-V 2.5-ppm/°C second-order compensated bandgap reference.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

An overview of soft-switching technique for flyback converters.
Proceedings of the 2015 IEEE 11th International Conference on ASIC, 2015

2014
Sensorless Predictive Current Controlled DC-DC Converter With a Self-Correction Differential Current Observer.
IEEE Trans. Ind. Electron., 2014

Sensorless Predictive Peak Current Control for Boost Converter Using Comprehensive Compensation Strategy.
IEEE Trans. Ind. Electron., 2014

An Optimal Current Observer for Predictive Current Controlled Buck DC-DC Converters.
Sensors, 2014

Design and Implementation of a RF Powering Circuit for RFID Tags or Other Batteryless Embedded Devices.
Sensors, 2014

Design of an Elliptic Curve Cryptography Processor for RFID Tag Chips.
Sensors, 2014

A Compact Hardware Implementation of SM3 Hash Function.
Proceedings of the 13th IEEE International Conference on Trust, 2014

The design and verification of a novel LDPC decoder with high-efficiency.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

A +33dBm 1.9 GHz linear CMOS power amplifier with MOS-level linearizers.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

A low power injection-locked divider for body sensor network.
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014

2013
Wideband Q-VCO using tail-current shaping based automatic amplitude control.
Microelectron. J., 2013

Off-Chip Memory Encryption and Integrity Protection Based on AES-GCM in Embedded Systems.
IEEE Des. Test, 2013

Latent Regression with Constrained Parameters to Determine the Weight Coefficients in Summary Index Model.
Commun. Stat. Simul. Comput., 2013

A CMOS low-noise amplifier for BCC applications.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

An improved analytical series resistance model for on-chip stacked inductors.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

A new high performance RF LDMOS with vertical n+n-p-p+ drain structure.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

A linearized VBE bandgap voltage reference with wide temperature range.
Proceedings of the IEEE 10th International Conference on ASIC, 2013

2012
Bayesian estimation in dynamic framed slotted ALOHA algorithm for RFID system.
Comput. Math. Appl., 2012

Memory monitor module for embedded systems.
Comput. Electr. Eng., 2012

2011
New Analysis and Design of a RF Rectifier for RFID and Implantable Devices.
Sensors, 2011

Implementation and evaluation of parallel FFT on Engineering and Scientific Computation Accelerator (ESCA) architecture.
J. Zhejiang Univ. Sci. C, 2011

An area-efficient 5GHz/10GHz dual-mode VCO with coupled helical inductors in 0.13-UM CMOS technology.
Proceedings of the 24th Canadian Conference on Electrical and Computer Engineering, 2011

An accurate physics-based method for calculating DC inductance of on-chip square multi-layer inductors.
Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010
New design of RF rectifier for passive UHF RFID transponders.
Microelectron. J., 2010

Designing a compact soft-start scheme for voltage-mode DC-DC switching converters.
Microelectron. J., 2010

A definite linear algorithm for structural equation model.
Math. Comput. Model., 2010

A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2010

A High Efficient On-Chip Interconnection Network in SIMD CMPs.
Proceedings of the Algorithms and Architectures for Parallel Processing, 2010

The parallel algorithm implementation of matrix multiplication based on ESCA.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A RFID Authentication Protocol Based on Infinite Dimension Pseudo Random Number Generator.
Proceedings of the Second International Joint Conference on Computational Sciences and Optimization, 2009

Dynamic Framed Slotted ALOHA Algorithm Based on Bayesian Estimation in RFID System.
Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009

2008
A novel current reference based on subthreshold MOSFETs with high PSRR.
Microelectron. J., 2008

Efficient DPA Attacks on AES Hardware Implementations.
Int. J. Commun. Netw. Syst. Sci., 2008

A Study of Video-on-Demand Learning System in E-learning Platform.
Proceedings of the International Conference on Computer Science and Software Engineering, 2008

A novel schmitt trigger with low temperature coeficient.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Dynamic current limitation circuit for white LED driver.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

Clock control strategy of four-phase Dickson charge pump for power efficiency improvement.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

A 90nm CMOS wide-band voltage-controlled ring oscillator for digital TV-tuner.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

A precise bandgap reference with intrinsic compensation for current-mirror mismatch.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
On the Ability of AES S-Boxes to Secure Against Correlation Power Analysis.
Proceedings of the Information Security Practice and Experience, 2007

Parameter Estimate by Incomplete Neural Network for MOSFET Life Model with NOME Distribution.
Proceedings of the Third International Conference on Natural Computation, 2007

Dynamically Reconfigurable Cache for Low-Power Embedded System.
Proceedings of the Third International Conference on Natural Computation, 2007

2006
A 1.25 Gbps DC-coupled laser diode driver with V<sub>BE</sub> compensation technique.
Microelectron. J., 2006

Adaptive Interpolation Algorithm for Real-time Image Resizing.
Proceedings of the First International Conference on Innovative Computing, Information and Control (ICICIC 2006), 30 August, 2006

2005
The Software/Hardware Co-Debug Environment with Emulator.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

2003
Analog signal generator for BIST of wideband IF signals bandpass sigma-delta modulator.
Microelectron. J., 2003

2002
Influence of polysilicon-gate depletion on the subthreshold behavior of submicron MOSFETs.
Microelectron. Reliab., 2002


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