Xuechao Wei

According to our database, Xuechao Wei authored at least 23 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

POSTER: RadiK: Scalable Radix Top-K Selection on GPUs.

Yifei Li, Bole Zhou, Jiejing Zhang, Xuechao Wei, Yinghan Li, Yingda Chen

Proceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming, 2024

RadiK: Scalable and Optimized GPU-Parallel Radix Top-K Selection.

Yifei Li, Bole Zhou, Jiejing Zhang, Xuechao Wei, Yinghan Li, Yingda Chen

Proceedings of the 38th ACM International Conference on Supercomputing, 2024

PT-Map: Efficient Program Transformation Optimization for CGRA Mapping.

Bizhao Shi, Tuo Dai, Jiaxi Zhang, Xuechao Wei, Guojie Luo

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

An <i>Intermediate-Centric</i> Dataflow for Transposed Convolution Acceleration on FPGA.

Zhengzheng Ma, Tuo Dai, Xuechao Wei, Guojie Luo

ACM Trans. Embed. Comput. Syst., November, 2023

Efficient Super-Resolution System With Block-Wise Hybridization and Quantized Winograd on FPGA.

Bizhao Shi, Jiaxi Zhang, Zhuolun He, Xuechao Wei, Sicheng Li, Guojie Luo, Hongzhong Zheng, Yuan Xie

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis.

Chen Bai, Jiayi Huang, Xuechao Wei, Yuzhe Ma, Sicheng Li, Hongzhong Zheng, Bei Yu, Yuan Xie

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

Klotski: DNN Model Orchestration Framework for Dataflow Architecture Accelerators.

Chen Bai, Xuechao Wei, Youwei Zhuo, Yi Cai, Hongzhong Zheng, Bei Yu, Yuan Xie

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022

PetS: A Unified Framework for Parameter-Efficient Transformers Serving.

Zhe Zhou, Xuechao Wei, Jiejing Zhang, Guangyu Sun

Proceedings of the 2022 USENIX Annual Technical Conference, 2022

2022 ICCAD CAD Contest Problem C: Microarchitecture Design Space Exploration.

Sicheng Li, Chen Bai, Xuechao Wei, Bizhao Shi, Yen-Kuang Chen, Yuan Xie

Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

GNNear: Accelerating Full-Batch Training of Graph Neural Networks with near-Memory Processing.

Zhe Zhou, Cong Li, Xuechao Wei, Xiaoyang Wang, Guangyu Sun

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2022

2021

GCNear: A Hybrid Architecture for Efficient GCN Training with Near-Memory Processing.

Zhe Zhou, Cong Li, Xuechao Wei, Guangyu Sun

CoRR, 2021

2020

Generating Systolic Array Accelerators With Reusable Blocks.

Liancheng Jia, Liqiang Lu, Xuechao Wei, Yun Liang

IEEE Micro, 2020

FTDL: An FPGA-tailored Architecture for Deep Learning Systems.

Runbin Shi, Yuhao Ding, Xuechao Wei, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

FTDL: A Tailored FPGA-Overlay for Deep Learning with High Scalability.

Runbin Shi, Yuhao Ding, Xuechao Wei, He Li, Hang Liu, Hayden Kwok-Hay So, Caiwen Ding

Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019

Frequency Improvement of Systolic Array-Based CNNs on FPGAs.

Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong

Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Overcoming Data Transfer Bottlenecks in DNN Accelerators via Layer-Conscious Memory Managment.

Xuechao Wei, Yun Liang, Peng Zhang, Cody Hao Yu, Jason Cong

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

Overcoming Data Transfer Bottlenecks in FPGA-based DNN Accelerators via Layer Conscious Memory Management.

Xuechao Wei, Yun Liang, Jason Cong

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018

TGPA: tile-grained pipeline architecture for low latency CNN inference.

Xuechao Wei, Yun Liang, Xiuhong Li, Cody Hao Yu, Peng Zhang, Jason Cong

Proceedings of the International Conference on Computer-Aided Design, 2018

2017

Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs.

Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong

Proceedings of the 54th Annual Design Automation Conference, 2017

Throughput optimization for streaming applications on CPU-FPGA heterogeneous systems.

Xuechao Wei, Yun Liang, Tao Wang, Songwu Lu, Jason Cong

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2012

FlexBFS: a parallelism-aware implementation of breadth-first search on GPU.

Gu Liu, Hong An, Wenting Han, Xiaoqiang Li, Tao Sun, Wei Zhou, Xuechao Wei, Xulong Tang

Proceedings of the 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2012

Distributed replay protocol for distributed uniprocessors.

Mengjie Mao, Hong An, Bobin Deng, Tao Sun, Xuechao Wei, Wei Zhou, Wenting Han

Proceedings of the International Conference on Supercomputing, 2012

Distributed Control Independence for Composable Multi-processors.

Mengjie Mao, Hong An, Tao Sun, Qi Li, Bobin Deng, Xuechao Wei, Junrui Zhou

Proceedings of the 2012 IEEE/ACIS 11th International Conference on Computer and Information Science, Shanghai, China, May 30, 2012