Xubin Chen
Orcid: 0000-0003-1370-4237
According to our database1,
Xubin Chen
authored at least 28 papers
between 2007 and 2022.
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Bibliography
2022
Closing the B+-tree vs. LSM-tree Write Amplification Gap on Modern Storage Hardware with Built-in Transparent Compression.
Proceedings of the 20th USENIX Conference on File and Storage Technologies, 2022
2021
Improving Relational Database Upon the Arrival of Storage Hardware with Built-in Transparent Compression.
Proceedings of the IEEE International Conference on Networking, Architecture and Storage, 2021
Implementing Flash-Cached Storage Systems Using Computational Storage Drive with Built-in Transparent Compression.
Proceedings of the IEEE International Conference on Networking, Architecture and Storage, 2021
KallaxDB: A Table-less Hash-based Key-Value Store on Storage Hardware with Built-in Transparent Compression.
Proceedings of the 17th International Workshop on Data Management on New Hardware, 2021
2020
PhD thesis, 2020
Architecting Heterogeneous Memory Systems with DRAM Technology Only: A Case Study on Relational Database.
Proceedings of the IEEE/ACM Workshop on Memory Centric High Performance Computing, 2020
WAL-assisted Tiering: Painlessly Improving Your Favorite Log-Structured KV Store Instead of Building a New One.
Proceedings of the MEMSYS 2020: The International Symposium on Memory Systems, 2020
Proceedings of the 22nd IEEE International Conference on High Performance Computing and Communications; 18th IEEE International Conference on Smart City; 6th IEEE International Conference on Data Science and Systems, 2020
Re-think Data Management Software Design Upon the Arrival of Storage Hardware with Built-in Transparent Compression.
Proceedings of the 12th USENIX Workshop on Hot Topics in Storage and File Systems, 2020
2019
ACM Trans. Storage, 2019
Reducing Flash Memory Write Traffic by Exploiting a Few MBs of Capacitor-Powered Write Buffer Inside Solid-State Drives (SSDs).
IEEE Trans. Computers, 2019
A 0.07-3 GHz wideband front-end for SDR receiver with 2.3 dB NF and 12 dBm IIP<sub>3</sub> in 65 nm CMOS.
IEICE Electron. Express, 2019
A 14 bit 500 MS/s SHA-less pipelined ADC with a highly linear input buffer and power-efficient supply voltage domain arrangement in 40 nm CMOS.
IEICE Electron. Express, 2019
Mitigate HDD Fail-Slow by Pro-actively Utilizing System-level Data Redundancy with Enhanced HDD Controllability and Observability.
Proceedings of the 35th Symposium on Mass Storage Systems and Technologies, 2019
Simultaneously reducing cost and improving performance of NVM-based block devices via transparent data compression.
Proceedings of the International Symposium on Memory Systems, 2019
2018
IEEE Access, 2018
2017
J. Electr. Comput. Eng., 2017
2016
Proceedings of the IEEE 84th Vehicular Technology Conference, 2016
2013
IEICE Trans. Commun., 2013
2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011
2010
Proceedings of the 2010 Wireless Telecommunications Symposium, 2010
2008
Multi-User MIMO Systems Using Semi-Orthogonal Space Division Multiplexing with Alamouti Code.
Proceedings of the 67th IEEE Vehicular Technology Conference, 2008
Look-Ahead Scheme for High Speed Consecutive Micro Line Interpolation Based on Dynamics of Machine Tool.
Proceedings of the Intelligent Robotics and Applications, First International Conference, 2008
Performance Analysis for Maximal Ratio Combining of Correlated Rician Multi-Path Fading Signals with Noise.
Proceedings of IEEE International Conference on Communications, 2008
2007
Analytical Envelope Correlation and Outage Probability of Maximal-Ratio Combined Rician Fading Channels.
Proceedings of the 66th IEEE Vehicular Technology Conference, 2007
Proceedings of the IEEE 18th International Symposium on Personal, 2007
Performance Analysis of Envelope Correlation and Average Capacity with MRC in Correlated Rician Fading Channels.
Proceedings of the IEEE 18th International Symposium on Personal, 2007