Xuan Zhang
Orcid: 0000-0002-0482-5435Affiliations:
- Harvard University, Cambridge, MA, USA
- Washington University in St. Louis, MO, USA
According to our database1,
Xuan Zhang
authored at least 89 papers
between 2007 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
PowerScout: Security-Oriented Power Delivery Network Modeling for Side-Channel Vulnerability Analysis.
IEEE Trans. Emerg. Top. Comput., 2024
RoSE-Opt: Robust and Efficient Analog Circuit Parameter Optimization with Knowledge-infused Reinforcement Learning.
CoRR, 2024
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024
Proceedings of the Euro-Par 2024: Parallel Processing, 2024
Hardware Phi-1.5B: A Large Language Model Encodes Hardware Domain Specific Knowledge.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024
2023
RTGPU: Real-Time GPU Scheduling of Hard Deadline Parallel Tasks With Fine-Grain Utilization.
IEEE Trans. Parallel Distributed Syst., May, 2023
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2023
IEEE Trans. Inf. Forensics Secur., 2023
Proceedings of the 29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2023
Energy Efficient Real-Time Scheduling on Heterogeneous Architectures with Self-Suspension.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
LeCA: In-Sensor Learned Compressive Acquisition for Efficient Machine Vision on the Edge.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
CAMJ: Enabling System-Level Energy Modeling and Architectural Exploration for In-Sensor Visual Computing.
Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023
Proceedings of the Eleventh International Conference on Learning Representations, 2023
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
Proceedings of the 41st IEEE International Conference on Computer Design, 2023
PDNSig: Identifying Multi-Tenant Cloud FPGAs with Power Distribution Network-Based Signatures.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Invited Paper: Learned In-Sensor Visual Computing: From Compression to Eventification.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Proceedings of the 20th ACM International Conference on Computing Frontiers, 2023
2022
IEEE Trans. Computers, 2022
Near-Memory Processing in Action: Accelerating Personalized Recommendation With AxDIMM.
IEEE Micro, 2022
IEEE Des. Test, 2022
DisaggRec: Architecting Disaggregated Systems for Large-Scale Personalized Recommendation.
CoRR, 2022
Domain Knowledge-Infused Deep Learning for Automated Analog/Radio-Frequency Circuit Parameter Optimization.
CoRR, 2022
Domain Knowledge-Based Automated Analog Circuit Design with Deep Reinforcement Learning.
CoRR, 2022
HOGEye: Neural Approximation of HOG Feature Extraction in RRAM-Based 3D-Stacked Image Sensors.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
MeNDA: a near-memory multi-way merge solution for sparse transposition and dataflows.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022
PowerTouch: A Security Objective-Guided Automation Framework for Generating Wired Ghost Touch Attacks on Touchscreens.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Gzippo: Highly-Compact Processing-in-Memory Graph Accelerator Alleviating Sparsity and Redundancy.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
Hercules: Heterogeneity-Aware Inference Serving for At-Scale Personalized Recommendation.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
Evaluating Neural Network-Inspired Analog-to-Digital Conversion With Low-Precision RRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
System-level Early-stage Modeling and Evaluation of IVR-assisted Processor Power Delivery System.
ACM Trans. Archit. Code Optim., 2021
IACR Cryptol. ePrint Arch., 2021
Proceedings of the IEEE/CVF International Conference on Computer Vision Workshops, 2021
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the Third IEEE International Conference on Cognitive Machine Intelligence, 2021
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021
2020
PCBChain: Lightweight Reconfigurable Blockchain Primitives for Secure IoT Applications.
IEEE Trans. Very Large Scale Integr. Syst., 2020
Processing Near Sensor Architecture in Mixed-Signal Domain With CMOS Image Sensor of Convolutional-Kernel-Readout Method.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power Management.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
J. Syst. Archit., 2020
A Quantitative Exploration of Collaborative Pruning and Approximation Computing Towards Energy Efficient Neural Networks.
IEEE Des. Test, 2020
Finding Physical Adversarial Examples for Autonomous Driving with Fast and Differentiable Image Compositing.
CoRR, 2020
Real-Time Scheduling upon a Host-Centric Acceleration Architecture with Data Offloading.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020
Proceedings of the MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD, 2020
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020
Proceedings of the 2020 IEEE High Performance Extreme Computing Conference, 2020
Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020
Bit<sup>2</sup>RNG: Leveraging Bad-page Initialized Table with Bit-error Insertion for True Random Number Generation in Commodity Flash Memory.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020
FLASH: FPGA Locality-Aware Sensitive Hash for Nearest Neighbor Search and Clustering Application.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020
PowerScout: A Security-Oriented Power Delivery Network Modeling Framework for Cross-Domain Side-Channel Analysis.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020
2019
CoRR, 2019
Proceedings of the 15th IEEE International Conference on Embedded Software and Systems, 2019
Neural Network-Inspired Analog-to-Digital Conversion to Achieve Super-Resolution with Low-Precision RRAM Devices.
Proceedings of the International Conference on Computer-Aided Design, 2019
SparseBNN: Joint Algorithm/Hardware Optimization to Exploit Structured Sparsity in Binary Neural Network.
Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019
When Capacitors Attack: Formal Method Driven Design and Detection of Charge-Domain Trojans.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
NeuADC: Neural Network-Inspired RRAM-Based Synthesizable Analog-to-Digital Conversion with Reconfigurable Quantization Support.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
2018
Joint Design of Training and Hardware Towards Efficient and Accuracy-Scalable Neural Network Inference.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018
Voltage-Stacked GPUs: A Control Theory Driven Cross-Layer Solution for Practical Voltage Stacking in GPUs.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
NNest: Early-Stage Design Space Exploration Tool for Neural Network Inference Accelerators.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Proceedings of the International Symposium on Low Power Electronics and Design, 2018
Efficient and reliable power delivery in voltage-stacked manycore system with hybrid charge-recycling regulators.
Proceedings of the 55th Annual Design Automation Conference, 2018
SRAM based opportunistic energy efficiency improvement in dual-supply near-threshold processors.
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 27th IEEE Asian Test Symposium, 2018
2017
A 16-Core Voltage-Stacked System With Adaptive Clocking and an Integrated Switched-Capacitor DC-DC Converter.
IEEE Trans. Very Large Scale Integr. Syst., 2017
A Fully Integrated Battery-Powered System-on-Chip in 40-nm CMOS for Closed-Loop Control of Insect-Scale Pico-Aerial Vehicle.
IEEE J. Solid State Circuits, 2017
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
A Fully Integrated Reconfigurable Switched-Capacitor DC-DC Converter With Four Stacked Output Channels for Voltage Stacking Applications.
IEEE J. Solid State Circuits, 2016
2015
Proceedings of the Symposium on VLSI Circuits, 2015
A 16-core voltage-stacked system with an integrated switched-capacitor DC-DC converter.
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015
2014
Low-Power, Minimally Invasive Process Compensation Technique for Sub-Micron CMOS Amplifiers.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Evaluating Adaptive Clocking for Supply-Noise Resilience in Battery-Powered Aerial Microrobotic System-on-Chip.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014
2013
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Supply-noise resilient adaptive clocking for battery-powered aerial microrobotic System-on-Chip in 40nm CMOS.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
A fully integrated battery-connected switched-capacitor 4: 1 voltage regulator with 70% peak efficiency using bottom-plate charge recycling.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
IEEE Trans. Circuits Syst. II Express Briefs, 2012
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
A Low-Power, Process-and- Temperature- Compensated Ring Oscillator With Addition-Based Current Source.
IEEE Trans. Circuits Syst. I Regul. Pap., 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010
2009
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009
Proceedings of the 35th European Solid-State Circuits Conference, 2009
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
IEEE J. Solid State Circuits, 2007