Xuan Truong Nguyen

Orcid: 0000-0002-7527-6971

Affiliations:

Seoul National University, South Korea

According to our database¹, Xuan Truong Nguyen authored at least 25 papers between 2018 and 2024.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2024

A Highly-Scalable Deep-Learning Accelerator With a Cost-Effective Chip-to-Chip Adapter and a C2C-Communication-Aware Scheduler.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., September, 2024

A Low-Latency FPGA Accelerator for YOLOv3-Tiny With Flexible Layerwise Mapping and Dataflow.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

USDN: A Unified Sample-wise Dynamic Network with Mixed-Precision and Early-Exit.

[BibT_eX]

[DOI]

Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024

A Scalable Multi-Chip YOLO Accelerator With a Lightweight Inter-Chip Adapter.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

A Resource-Constrained Spatio-Temporal Super Resolution Model.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Reconfigurable One-Adder Multiplication for CNN Acceleration.

[BibT_eX]

[DOI]

Kihwan Kim

Hyuk-Jae Lee

Xuan Truong Nguyen

Proceedings of the International Conference on Electronics, Information, and Communication, 2024

Mitigation of Over-Confidence in Scale-Adjusted Training for Early-Exit Networks.

[BibT_eX]

[DOI]

Ji-Ye Jeon

Xuan Truong Nguyen

Hyuk-Jae Lee

Proceedings of the International Conference on Electronics, Information, and Communication, 2024

IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System.

[BibT_eX]

[DOI]

Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

Real Post-Training Quantization Framework for Resource-Optimized Multiplier in LLMs.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

A Low-Latency and Scalable Vector Engine with Operation Fusion for Transformers.

[BibT_eX]

[DOI]

Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023

Accelerating Super-Resolution Network Inference via Sensitivity-Based Weight Sparsity Allocation.

[BibT_eX]

[DOI]

IEEE Access, 2023

Live Demonstration: Layer-wise Configurable CNN Accelerator with High PE Utilization.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

ViT-P3DE∗: Vision Transformer Based Multi-Camera Instance Association with Pseudo 3D Position Embeddings.

[BibT_eX]

[DOI]

Minseok Seo

Hyuk-Jae Lee

Xuan Truong Nguyen

Proceedings of the Thirty-Second International Joint Conference on Artificial Intelligence, 2023

Eight-bit Quantization for Super-Resolution Networks and Its Hardware Implementation.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Electronics, Information, and Communication, 2023

2022

An Energy-Efficient YOLO Accelerator Optimizing Filter Switching Activity.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Computation-Skipping Mask Generation for Super-Resolution Networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Electronics, Information, and Communication, 2022

A Real-time Super-resolution Accelerator Using a big. LITTLE Core Architecture.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

Improving Deep-Learning-based Optical Music Recognition for Camera-based Inputs.

[BibT_eX]

[DOI]

Weihan Ng

Xuan Truong Nguyen

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2020

An Efficient Sampling Algorithm With a K-NN Expanding Operator for Depth Data Acquisition in a LiDAR System.

[BibT_eX]

[DOI]

Xuan Truong Nguyen

Hyun Kim

Hyuk-Jae Lee

IEEE Trans. Circuits Syst. Video Technol., 2020

An MAE-aware ROI Sampling Model for LiDAR.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2020

2019

A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation.

[BibT_eX]

[DOI]

Dinh Van Luan

Xuan Truong Nguyen

Hyuk-Jae Lee

ACM Trans. Reconfigurable Technol. Syst., 2019

ROI-Based LiDAR Sampling Algorithm in on-Road Environment for Autonomous Driving.

[BibT_eX]

[DOI]

IEEE Access, 2019

A Hardware-Friendly Compression Algorithm for Profiling DDR4 Memory Accesses.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Electronics, Information, and Communication, 2019

2018

A Low-Cost Hardware Design of a 1-D SPIHT Algorithm for Video Display Systems.

[BibT_eX]

[DOI]

Xuan Truong Nguyen

Hyuk-Jae Lee

Hyun Kim

IEEE Trans. Consumer Electron., 2018

A New FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation of Operating Condition Variation.

[BibT_eX]

[DOI]

Dinh Van Luan

Xuan Truong Nguyen

Hyuk-Jae Lee

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Xuan Truong Nguyen

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