Xinying Wang

According to our database, Xinying Wang authored at least 6 papers between 2011 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

Parallelizing Latent Semantic Indexing using an FPGA-based architecture.

Xinying Wang, Joseph Zambreno

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015

A Configurable Architecture for Sparse LU Decomposition on Matrices with Arbitrary Patterns.

Xinying Wang, Phillip H. Jones, Joseph Zambreno

SIGARCH Comput. Archit. News, 2015

2014

A Reconfigurable Architecture for QR Decomposition Using a Hybrid Approach.

Xinying Wang, Phillip H. Jones, Joseph Zambreno

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

An FPGA Implementation of the Hestenes-Jacobi Algorithm for Singular Value Decomposition.

Xinying Wang, Joseph Zambreno

Proceedings of the 2014 IEEE International Parallel & Distributed Processing Symposium Workshops, 2014

An Efficient Architecture for Floating-Point Eigenvalue Decomposition.

Xinying Wang, Joseph Zambreno

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2011

Circumventing a ring oscillator approach to FPGA-based hardware Trojan detection.

Justin Rilling, David Graziano, Jamin Hitchcock, Tim Meyer, Xinying Wang, Phillip H. Jones, Joseph Zambreno

Proceedings of the IEEE 29th International Conference on Computer Design, 2011