Xinning Liu

According to our database, Xinning Liu authored at least 25 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNs.

An Guo, Xi Chen, Fangyuan Dong, Jinwu Chen, Zhihang Yuan, Xing Hu, Yuanpeng Zhang, Jingmin Zhang, Yuchen Tang, Zhican Zhang, Gang Chen, Dawei Yang, Zhaoyang Zhang, Lizheng Ren, Tianzhu Xiong, Bo Wang, Bo Liu, Weiwei Shan, Xinning Liu, Hao Cai, Guangyu Sun, Jun Yang, Xin Si

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

Association Analysis and Cross-Selling Strategy for Sports Products Based on Apriori and K-means Algorithms.

Tianxia Xie, Xinning Liu, Yingjie He

Proceedings of the 2024 International Conference on Cloud Computing and Big Data, 2024

2023

An efficient path delay variability model for wide-voltage-range digital circuits.

Weiwei Shan, Yuqiang Cui, Wentao Dai, Xinning Liu, Jingjing Guo, Peng Cao, Jun Yang

Sci. China Inf. Sci., February, 2023

2022

Proposal of Analog In-Memory Computing With Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell.

Hao Cai, Yanan Guo, Bo Liu, Mingyang Zhou, Juntong Chen, Xinning Liu, Jun Yang

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

SCVR-Less Dynamic Voltage-Stacking Scheme for IoT MCU.

Xinning Liu, Xiaomin Li, Huanqing Zhang, Chenyang Li, Lizheng Ren, Qing Chen, Yibo Xu, Jun Yang

IEEE J. Solid State Circuits, 2022

Bit-error-rate aware sensing-error correction interaction in spintronic MRAM.

Hao Cai, Xinfang Tong, Pengcheng Wu, Xinning Liu, Bo Liu

J. Syst. Archit., 2022

2021

29.8 115nA@3V ULPMark-CP Score 1205 SCVR-Less Dynamic Voltage-Stacking Scheme for IoT MCU.

Xiaomin Li, Yibo Xu, Lizheng Ren, Weiwei Ge, Jianlong Cai, Xinning Liu, Jun Yang

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

Addressing Failure and Aging Degradation in MRAM/MeRAM-on-FDSOI Integration.

Hao Cai, You Wang, Lirida Alves de Barros Naviner, Xinning Liu, Weiwei Shan, Jun Yang, Weisheng Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

An embedded implementation of CNN-based hand detection and orientation estimation algorithm.

Li Yang, Zhi Qi, Zeheng Liu, Hao Liu, Ming Ling, Longxing Shi, Xinning Liu

Mach. Vis. Appl., 2019

A Novel High-speed FPGA-based True Random Number Generator Based on Chaotic Ring Oscillator.

Xinning Liu, Song Jia, Hanzun Zhang

Proceedings of the 13th IEEE International Conference on ASIC, 2019

2018

A Low Overhead, Within-a-Cycle Adaptive Clock Stretching Circuit With Wide Operating Range in 40-nm CMOS.

Weiwei Shan, Liang Wan, Xinning Liu, Xinchao Shang, Wentao Dai, Shuai Shao, Jun Yang, Longxing Shi

IEEE Trans. Circuits Syst. II Express Briefs, 2018

HTD: A Light-Weight Holosymmetrical Transition Detector for Wide-Voltage-Range Variation Resilient ICs.

Wentao Dai, Weiwei Shan, Xinchao Shang, Xinning Liu, Hao Cai, Jun Yang

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

A Double Sensing Scheme With Selective Bitline Voltage Regulation for Ultralow-Voltage Timing Speculative SRAM.

Jun Yang, Hao Ji, Yichen Guo, Jizhe Zhu, Yuan Zhuang, Zhi Li, Xinning Liu, Longxing Shi

IEEE J. Solid State Circuits, 2018

Design and Implementation of a Reconfigurable Cryptographic Coprocessor with Multiple Side-Channel Attacks Countermeasures.

Xinchao Shang, Weiwei Shan, Xinning Liu

J. Circuits Syst. Comput., 2018

A Low-Overhead Timing Monitoring Technique for Variation-Tolerant Near-Threshold Digital Integrated Circuits.

Weiwei Shan, Xinning Liu, Minyi Lu, Liang Wan, Jun Yang

IEEE Access, 2018

MRAM-on-FDSOI Integration: A Bit-Cell Perspective.

Hao Cai, You Wang, Wang Kang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power.

Hao Cai, Menglin Han, You Wang, Lirida A. B. Naviner, Xinning Liu, Jun Yang, Weisheng Zhao

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

2017

An improved timing error prediction monitor for wide adaptive frequency scaling.

Weiwei Shan, Xinning Liu, Minyi Lu, Shuai Shao, Zhikuang Cai, Jun Yang

IEICE Electron. Express, 2017

Analytical inverter chain's delay and its variation model for sub-threshold circuits.

Jingjing Guo, Jizhe Zhu, Min Wang, Jianxin Nie, Xinning Liu, Wei Ge, Jun Yang

IEICE Electron. Express, 2017

Analytical hold timing fixing for sub-threshold circuit based on its lognormal distribution.

Jingjing Guo, Min Wang, Jizhe Zhu, Xinning Liu, Jun Yang

Proceedings of the 27th International Symposium on Power and Timing Modeling, 2017

HTD: A light-weight holosymmetrical transition detector based in-situ timing monitoring technique for wide-voltage-range in 40nm CMOS.

Wentao Dai, Weiwei Shan, Xinning Liu, Jun Yang

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D IC.

Tailong Xu, Feng Xue, Zhikuang Cai, Xinning Liu, Shuo Meng

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2015

A GPS Bit Synchronization Method Based on Frequency Compensation.

Xinning Liu, Yuxiang Niu, Jun Yang, Peng Cao

IEICE Trans. Commun., 2015

2012

Date Flow Optimization of Dynamically Coarse Grain Reconfigurable Architecture for Multimedia Applications.

Xinning Liu, Chen Mei, Peng Cao, Min Zhu, Longxing Shi

IEICE Trans. Inf. Syst., 2012

An energy-efficiency Optimized LEACH-C for wireless sensor networks.

Shuo Shi, Xinning Liu, Xuemai Gu

Proceedings of the 7th International Conference on Communications and Networking in China, 2012