Xingyu Pu

According to our database, Xingyu Pu authored at least 4 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 28-nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs.

An Guo, Chen Xi, Fangyuan Dong, Xingyu Pu, Dongqi Li, Jingmin Zhang, Xueshan Dong, Hui Gao, Yiran Zhang, Bo Wang, Jun Yang, Xin Si

IEEE J. Solid State Circuits, September, 2024

A 28nm 16kb Aggregation and Combination Computing-in-Memory Macro with Dual-level Sparsity Modulation and Sparse-Tracking ADCs for GCNs.

Zhaoyang Zhang, Zhichao Liu, Feiran Liu, Yinhai Gao, Yuchen Ma, Yutong Zhang, An Guo, Tianzhu Xiong, Jinwu Chen, Xi Chen, Bo Wang, Yuchen Tang, Xingyu Pu, Xing Wang, Jun Yang, Xin Si

Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

From macro to microarchitecture: reviews and trends of SRAM-based compute-in-memory circuits.

Zhaoyang Zhang, Jinwu Chen, Xi Chen, An Guo, Bo Wang, Tianzhu Xiong, Yuyao Kong, Xingyu Pu, Shengnan He, Xin Si, Jun Yang

Sci. China Inf. Sci., October, 2023

A 28nm 64-kb 31.6-TFLOPS/W Digital-Domain Floating-Point-Computing-Unit and Double-Bit 6T-SRAM Computing-in-Memory Macro for Floating-Point CNNs.

An Guo, Xin Si, Xi Chen, Fangyuan Dong, Xingyu Pu, Dongqi Li, Yongliang Zhou, Lizheng Ren, Yeyang Xue, Xueshan Dong, Hui Gao, Yiran Zhang, Jingmin Zhang, Yuyao Kong, Tianzhu Xiong, Bo Wang, Hao Cai, Weiwei Shan, Jun Yang

Proceedings of the IEEE International Solid- State Circuits Conference, 2023