Xinfei Guo

Orcid: 0000-0002-2374-3953

Affiliations:
  • Shanghai Jiao Tong University, China


According to our database1, Xinfei Guo authored at least 35 papers between 2014 and 2024.

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Bibliography

2024
Impact of Aging and Process Variability on SRAM-Based In-Memory Computing Architectures.
IEEE Trans. Circuits Syst. I Regul. Pap., June, 2024

Hot-LEGO: Architect Microfluidic Cooling Equipped 3DICs with Pre-RTL Thermal Simulation.
CoRR, 2024

Unveiling Proactive Recovery's Preventative Impact on NAND Flash Wearout.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

CINEMA: A Configurable Binary Segmentation Based Arithmetic Module for Mixed-Precision In-Memory Acceleration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Standard Cells Do Matter: Uncovering Hidden Connections for High-Quality Macro Placement.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

ILD-MPQ: Learning-Free Mixed-Precision Quantization with Inter-Layer Dependency Awareness.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
RECO-ASCON: Reconfigurable ASCON hash functions for IoT applications.
Integr., November, 2023

LiteAIR5: A System-Level Framework for the Design and Modeling of AI-extended RISC-V Cores.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Improving Productivity and Efficiency of SSD Manufacturing Self-Test Process by Learning-Based Proactive Defect Prediction.
Proceedings of the IEEE International Test Conference, 2023

Hot-LEGO: Architect Microfluidic Cooling Equipped 3DIC with Pre-RTL Thermal Simulation.
Proceedings of the 14th International Green and Sustainable Computing Conference, 2023

Delay-Driven Physically-Aware Logic Synthesis with Informed Search.
Proceedings of the 41st IEEE International Conference on Computer Design, 2023

Design Space Exploration of Layer-Wise Mixed-Precision Quantization with Tightly Integrated Edge Inference Units.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

RC-GNN: Fast and Accurate Signoff Wire Delay Estimation with Customized Graph Neural Networks.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

A Hierarchically Reconfigurable SRAM-Based Compute-in-Memory Macro for Edge Computing.
Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022
Agile-AES: Implementation of configurable AES primitive with agile design approach.
Integr., 2022

RECO-HCON: A High-Throughput Reconfigurable Compact ASCON Processor for Trusted IoT.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022

Scheduling Active and Accelerated Recovery to Combat Aging in Integrated Circuits.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

Towards Everlasting Flash: Preventing Permanent Flash Cell Damage using Circadian Rhythms.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022

Beyond Verilog: Evaluating Chisel versus High-level Synthesis with Tiny Designs.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

2020
Towards on-node Machine Learning for Ultra-low-power Sensors Using Asynchronous Σ Δ Streams.
ACM J. Emerg. Technol. Comput. Syst., 2020

2019
ASC-FFT: Area-Efficient Low-Latency FFT Design Based on Asynchronous Stochastic Computing.
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

Towards low-power random forest using asynchronous computing with streams.
Proceedings of the Tenth International Green and Sustainable Computing Conference, 2019

Flexi-AES: A Highly-Parameterizable Cipher for a Wide Range of Design Constraints.
Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019

2018
A post-silicon hold time closure technique using data-path tunable-buffers for variation-tolerance in sub-threshold designs.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

When "things" get older: Exploring circuit aging in IoT applications.
Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

SC-SD: Towards Low Power Stochastic Computing Using Sigma Delta Streams.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018

OldSpot: A Pre-RTL Model for Fine-Grained Aging and Lifetime Optimization.
Proceedings of the 36th IEEE International Conference on Computer Design, 2018

2017
Dual-Data Rate Transpose-Memory Architecture Improves the Performance, Power and Area of Signal-Processing Systems.
J. Signal Process. Syst., 2017

Back to the Future: Digital Circuit Design in the FinFET Era.
J. Low Power Electron., 2017

Implications of accelerated self-healing as a key design knob for cross-layer resilience.
Integr., 2017

Deep Healing: Ease the BTI and EM Wearout Crisis by Activating Recovery.
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2017

PPE-ARX: Area- and power-efficient VLIW programmable processing element for IoT crypto-systems.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017

2016
Work hard, sleep well - Avoid irreversible IC wearout with proactive rejuvenation.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2014
A multi-output on-chip switched-capacitor DC-DC converter for near- and sub-threshold power modes.
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Modeling and Experimental Demonstration of Accelerated Self-Healing Techniques.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014


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