Xin Cheng
Orcid: 0000-0001-5793-3985Affiliations:
- Hefei University of Technology, School of Electronic Science and Applied Physics, China
- Chinese Academy of Sciences, Institute of Electronics, Beijing, China (PhD 2012)
According to our database1,
Xin Cheng
authored at least 38 papers
between 2014 and 2024.
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Bibliography
2024
IEEE Trans. Cogn. Dev. Syst., June, 2024
IEEE Des. Test, June, 2024
2023
Lightweight and flexible hardware implementation of authenticated encryption algorithm SIMON-Galois/Counter Mode.
Int. J. Circuit Theory Appl., December, 2023
An Energy-Efficient Binary-Interfaced Stochastic Multiplier Using Parallel Datapaths.
IEEE Trans. Very Large Scale Integr. Syst., September, 2023
Int. J. Circuit Theory Appl., July, 2023
Highly Accurate and Energy Efficient Binary-Stochastic Multipliers for Fault-Tolerant Applications.
IEEE Trans. Circuits Syst. II Express Briefs, February, 2023
2022
IEEE Trans. Circuits Syst. Video Technol., 2022
Design and Implementation of SRAM for LUT and CLB Using Clocking Mechanism in Quantum-Dot Cellular Automata.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
Weighted-Adder-Based Polynomial Computation Using Correlated Unipolar Stochastic Bitstreams.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A general and efficient clocking scheme for majority logic in quantum-dot cellular automata.
Microelectron. J., 2022
Integr., 2022
Int. J. Circuit Theory Appl., 2022
High-accuracy mean circuits design by manipulating correlation for stochastic computing.
Int. J. Circuit Theory Appl., 2022
2021
Using correction parameters to improve real-time video interpolation in low-cost VLSI implementation.
Microelectron. J., 2021
A reconfigurable and compact hardware architecture of CLEFIA block cipher with multi-configuration.
Microelectron. J., 2021
An output capacitor-less low-dropout regulator with wide load capacitance and current ranges.
Int. J. Circuit Theory Appl., 2021
A high-resolution hybrid digital pulse width modulator with dual-edge-triggered flip-flops and hardware compensation.
Int. J. Circuit Theory Appl., 2021
A Feedback Architecture of High Speed True Random Number Generator based on Ring Oscillator.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2021
2020
IEEE Trans. Circuits Syst., 2020
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
J. Circuits Syst. Comput., 2020
CFE: a convenient, flexible, and efficient clocking scheme for quantum-dot cellular automata.
IET Circuits Devices Syst., 2020
Algorithm-Hardware Co-Design of Real-Time Edge Detection for Deep-Space Autonomous Optical Navigation.
IEICE Trans. Inf. Syst., 2020
DM-IMCA: A dual-mode in-memory computing architecture for general purpose processing.
IEICE Electron. Express, 2020
High frequency and high efficiency DC-DC converter with sensorless adaptive-sizing technique.
IEICE Electron. Express, 2020
2019
Design and Analysis of a Novel Low-Power Exclusive-OR Gate Based on Quantum-Dot Cellular Automata.
J. Circuits Syst. Comput., 2019
A Fast and Accurate Edge Detection Algorithm for Real-Time Deep-Space Autonomous Optical Navigation.
Proceedings of the 10th IEEE International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications, 2019
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
A Single-Input Multi-Output Piezoelectric Energy Harvesting System Combining with P-SSHI and Cold Startup Circuit.
Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019
2018
IEICE Electron. Express, 2018
A Qi compatible wireless power receiver with integrated full-wave synchronous rectifier.
Sci. China Inf. Sci., 2018
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018
2017
J. Circuits Syst. Comput., 2017
IEICE Electron. Express, 2017
2014
Fast-Settling Feedforward Automatic Gain Control Based on a New Gain Control Approach.
IEEE Trans. Circuits Syst. II Express Briefs, 2014