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We stand with Ukraine

Xiaoyan Gui

Orcid: 0000-0002-4463-6129

According to our database¹, Xiaoyan Gui authored at least 33 papers between 2010 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of three.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

On csauthors.net:

Bibliography

2024

Signal Integrity Augmentation Techniques for the Design of 64-GBaud Coherent Transimpedance Amplifier in 90-nm SiGe BiCMOS.

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IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

An Integrated Burst-Mode 2R Receiver Employing Fast Residual Offset Canceller for XGS-PON in 40-nm CMOS.

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Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

A 4×4 5-6GHz CMOS Wi-Fi Transceiver Front-End for Fiber-to-the-Room with Analog Beamforming Achieving 27dBm 1024 QAM MCS11 EIRP and -45dB EVM Floor.

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Proceedings of the IEEE Custom Integrated Circuits Conference, 2024

2023

A CMOS slew-rate controlled output driver with low process, voltage and temperature variations using a dual-path signal-superposition technique.

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IET Circuits Devices Syst., January, 2023

A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS.

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Proceedings of the IEEE International Conference on Integrated Circuits, 2023

2022

A 12-Bit 20-kS/s 640-nW SAR ADC With a VCDL-Based Open-Loop Time-Domain Comparator.

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Nevena Ackovska

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IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 54-68 GHz Power Amplifier With Improved Linearity and Efficiency in 40 nm CMOS.

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IEEE Trans. Circuits Syst. II Express Briefs, 2022

A 10/2.5-Gb/s Hyper-Supplied CMOS Low-Noise Burst-Mode TIA with Loud Burst Protection and Gearbox Automatic Offset Cancellation for XGS-PON.

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Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

2021

A 10-bit 20-MS/s SAR DAC achieving 57.9-dB SNDR using insensitive geometry DAC array.

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Microelectron. J., 2021

A Low-Noise Stacked Differential Optical Receiver in 0.18-μm CMOS.

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Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A 100GBaud Optical Receiver Front-End in 90nm SiGe BiCMOS.

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Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 130-GBaud 2: 1 Analog Multiplexer in 130-nm SiGe BiCMOS.

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Proceedings of the 2021 IEEE International Conference on Integrated Circuits, 2021

A 720-mVpp 224-Gb/s PAM4 Optical Receiver with Multiple Peaking Techniques in 130-nm SiGe BiCMOS.

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Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2020

Low-Supply Sensitivity LC VCOs With Complementary Varactors.

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IEEE Trans. Very Large Scale Integr. Syst., 2020

A 112-Gb/s PAM-4 Linear Optical Receiver in 130-nm SiGe BiCMOS.

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Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Full-duplex Transceiver with Integrated Active Quasi-circulator Achieving Self-interference RF Cancellation over Wide Bandwidth.

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Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 100-Gb/s PAM-4 CTLE in 28-nm CMOS with Coarse-Fine Gain Adjustment.

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Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

A 16Gb/s Triple-Mode Driver in 0.18μm CMOS Technology.

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Proceedings of the 2020 IEEE International Conference on Integrated Circuits, 2020

2019

A Stacked 4×25 Gb/s Optical Receiver in 28 nm CMOS with 0.154 mW/Gb/s Power Efficiency.

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Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

A Multi-Channel 1.52 µVrms Front End with Orthogonal Frequency Chopping for Neural Recording Applications.

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Proceedings of the 2019 IEEE Asia Pacific Conference on Circuits and Systems, 2019

2018

Design of A Low-Supply Sensitivity LC VCO with Complementary Varactors.

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Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

A Dual-Path Open-Loop CMOS Slew-Rate Controlled Output Driver with low PVT Variation.

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Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2015

Design of a 12-bit 0.83 MS/s SAR ADC for an IPMI SoC.

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Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Modeling and design of a 0.8-30 GHz tunable inductor-less divide-by-2 frequency divider with digital frequency calibration.

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Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

2013

Design of CML Ring Oscillators With Low Supply Sensitivity.

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Michael M. Green

IEEE Trans. Circuits Syst. I Regul. Pap., 2013

Wireless circuits design for neural recording application.

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Proceedings of the 36th International Conference on Telecommunications and Signal Processing, 2013

Design and Implementation of a CMOS 1Gsps 5bit Flash ADC with Offset Calibration.

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Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013

Circuit Design of Analog Front-End for Neural Signal Detection.

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Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013

A Whole Integrated System for Detection of Neural Signal and Wireless Transmission.

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Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013

A Compensated Technique for 2.5-GHz Ring-Oscillator-Based PLL used in Wireless Transmission.

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Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013

Design and Implementation of a Circuit System for Neural Signal Detection.

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Proceedings of the 2013 IEEE International Conference on Green Computing and Communications (GreenCom) and IEEE Internet of Things (iThings) and IEEE Cyber, 2013

2011

Nonlinearities in frequency dividers.

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Michael M. Green

Proceedings of the 20th European Conference on Circuit Theory and Design, 2011

2010

High-speed CMOS ring oscillators with low supply sensitivity.

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Michael M. Green

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

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