Xiaoru Xie

Orcid: 0000-0001-7307-2855

According to our database1, Xiaoru Xie authored at least 6 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2024
Hardware Accelerator Design for Sparse DNN Inference and Training: A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

SWAT: An Efficient Swin Transformer Accelerator Based on FPGA.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2021
An Efficient and Flexible Accelerator Design for Sparse Convolutional Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

Automatic Generation of Dynamic Inference Architecture for Deep Neural Networks.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2021

2020
Efficient FPGA design for Convolutions in CNN based on FFT-pruning.
Proceedings of the 2020 IEEE Asia Pacific Conference on Circuits and Systems, 2020

2019
Fast-ABC: A Fast Architecture for Bottleneck-Like Based Convolutional Neural Networks.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019


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