Xiaochen Guo
Orcid: 0009-0004-7954-9967
According to our database1,
Xiaochen Guo
authored at least 40 papers
between 2010 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
Framework and Methods of State Monitoring-Based Positioning System on WIFI-RTT Clock Drift Theory.
IEEE Trans. Aerosp. Electron. Syst., February, 2024
Proceedings of the 33rd ACM SIGSOFT International Symposium on Software Testing and Analysis, 2024
Proceedings of the IEEE International Conference on Acoustics, 2024
2023
Precise and Efficient Patch Presence Test for Android Applications against Code Obfuscation.
Proceedings of the 32nd ACM SIGSOFT International Symposium on Software Testing and Analysis, 2023
Proceedings of the 24th Annual Conference of the International Speech Communication Association, 2023
Proceedings of the 24th Annual Conference of the International Speech Communication Association, 2023
Proceedings of the 45th IEEE/ACM International Conference on Software Engineering, 2023
HIRAC: A Hierarchical Accelerator with Sorting-based Packing for SpGEMMs in DNN Applications.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
2022
ACM Trans. Archit. Code Optim., 2022
Emerging monolithic 3D integration: Opportunities and challenges from the computer system perspective.
Integr., 2022
Radio Frequency Fingerprint Identification Based on Logarithmic Power Cosine Spectrum.
IEEE Access, 2022
Optimizing Recurrent Spiking Neural Networks with Small Time Constants for Temporal Tasks.
Proceedings of the ICONS 2022: International Conference on Neuromorphic Systems, Knoxville, TN, USA, July 27, 2022
2021
DOVA PRO: A Dynamic Overwriting Voltage Adjustment Technique for STT-MRAM L1 Cache Considering Dielectric Breakdown Effect.
IEEE Trans. Very Large Scale Integr. Syst., 2021
ACM Trans. Archit. Code Optim., 2021
Frontiers Comput. Neurosci., 2021
An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021
Proceedings of the ICONS 2021: International Conference on Neuromorphic Systems 2021, 2021
Efficient and Accurate Computational Model of Neuron with Spike Frequency Adaptation.
Proceedings of the 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society, 2021
2020
IEEE Trans. Computers, 2020
Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Content Aware Refresh: Exploiting the Asymmetry of DRAM Retention Errors to Reduce the Refresh Frequency of Less Vulnerable Data.
IEEE Trans. Computers, 2019
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019
2018
Sanitizer: Mitigating the Impact of Expensive ECC Checks on STT-MRAM Based Main Memories.
IEEE Trans. Computers, 2018
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018
2017
Proceedings of the International Symposium on Memory Systems, 2017
Proceedings of the International Symposium on Memory Systems, 2017
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017
2016
Reducing Switching Latency and Energy in STT-MRAM Caches With Field-Assisted Writing.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Proceedings of the Second International Symposium on Memory Systems, 2016
2015
IEEE Micro, 2015
2013
Proceedings of the 40th Annual International Symposium on Computer Architecture, 2013
2011
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011
2010
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing.
Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010