Xiaobo Sharon Hu

Orcid: 0000-0002-6636-9738

Affiliations:
  • University of Notre Dame, Department of Computer Science and Engineering


According to our database1, Xiaobo Sharon Hu authored at least 374 papers between 1988 and 2024.

Collaborative distances:

Awards

ACM Fellow

ACM Fellow 2021, "For contributions to the design of power-constrained and real-time embedded systems".

Timeline

Legend:

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Online presence:

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Bibliography

2024
Accelerating Finite-Field and Torus Fully Homomorphic Encryption via Compute-Enabled (S)RAM.
IEEE Trans. Computers, October, 2024

Compute-in-Memory-Based Neural Network Accelerators for Safety-Critical Systems: Worst-Case Scenarios and Protections.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024

U-SWIM: Universal Selective Write-Verify for Computing-in-Memory Neural Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024

A Computing-in-Memory-Based One-Class Hyperdimensional Computing Model for Outlier Detection.
IEEE Trans. Computers, June, 2024

Neuro-Symbolic Computing: Advancements and Challenges in Hardware-Software Co-Design.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

Report on the 2023 Embedded Systems Week (ESWEEK).
IEEE Des. Test, 2024

A 10.60 μW 150 GOPS Mixed-Bit-Width Sparse CNN Accelerator for Life-Threatening Ventricular Arrhythmia Detection.
CoRR, 2024

A Remedy to Compute-in-Memory with Dynamic Random Access Memory: 1FeFET-1C Technology for Neuro-Symbolic AI.
CoRR, 2024

Shared-PIM: Enabling Concurrent Computation and Data Flow for Faster Processing-in-DRAM.
CoRR, 2024

TSB: Tiny Shared Block for Efficient DNN Deployment on NVCIM Accelerators.
CoRR, 2024

CAMASim: A Comprehensive Simulation Framework for Content-Addressable Memory based Accelerators.
CoRR, 2024

A New Secure Memory System for Efficient Data Protection and Access Pattern Obfuscation.
CoRR, 2024

Efficient approximation of Earth Mover's Distance Based on Nearest Neighbor Search.
CoRR, 2024

Design of High-Performance and Compact CAM for Supporting Data-Intensive Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

Smoothing Disruption Across the Stack: Tales of Memory, Heterogeneity, & Compilers.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

Special Session: Sustainable Deployment of Deep Neural Networks on Non-Volatile Compute-in-Memory Accelerators.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2024

C4CAM: A Compiler for CAM-based In-memory Accelerators.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
Reliable Dynamic Packet Scheduling With Slot Sharing for Real-Time Wireless Networks.
IEEE Trans. Mob. Comput., November, 2023

MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

ApproxTrain: Fast Simulation of Approximate Multipliers for DNN Training and Inference.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2023

The importance of resource awareness in artificial intelligence for healthcare.
Nat. Mac. Intell., July, 2023

Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities.
Proc. IEEE, June, 2023

A Hybrid Optical-Electrical Analog Deep Learning Accelerator Using Incoherent Optical Signals.
ACM J. Emerg. Technol. Comput. Syst., April, 2023

Report on the 2022 Embedded Systems Week (ESWEEK).
IEEE Des. Test, February, 2023

An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs.
IEEE Trans. Emerg. Top. Comput., 2023

A Reconfigurable FeFET Content Addressable Memory for Multi-State Hamming Distance.
IEEE Trans. Circuits Syst. I Regul. Pap., 2023

Privacy Preserving In-memory Computing Engine.
CoRR, 2023

Negative Feedback Training: A Novel Concept to Improve Robustness of NVCiM DNN Accelerators.
CoRR, 2023

Compact and High-Performance TCAM Based on Scaled Double-Gate FeFETs.
CoRR, 2023

On the Viability of Using LLMs for SW/HW Co-Design: An Example in Designing CiM DNN Accelerators.
Proceedings of the 36th IEEE International System-on-Chip Conference, 2023

Real-Time Flow Scheduling in Industrial 5G New Radio.
Proceedings of the IEEE Real-Time Systems Symposium, 2023

Resource Virtualization with End-to-End Timing Guarantees for Multi-Hop Multi-Channel Real-Time Wireless Networks.
Proceedings of the IEEE Real-Time Systems Symposium, 2023

Improving Realistic Worst-Case Performance of NVCiM DNN Accelerators Through Training with Right-Censored Gaussian Noise.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

SEE-MCAM: Scalable Multi-Bit FeFET Content Addressable Memories for Energy Efficient Associative Search.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Accelerating Polynomial Modular Multiplication with Crossbar-Based Compute-in-Memory.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Invited Paper: Algorithm/Hardware Co-Design for Few-Shot Learning at the Edge.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Cross Layer Design for the Predictive Assessment of Technology-Enabled Architectures.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Contention-Free Configured Grant Scheduling for 5G URLLC Traffic.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

Compact and High-Performance TCAM Based on Scaled Double-Gate FeFETs.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

In-Memory Computing Accelerators for Emerging Learning Paradigms.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023

2022
IMCRYPTO: An In-Memory Computing Fabric for AES Encryption and Decryption.
IEEE Trans. Very Large Scale Integr. Syst., 2022

Deadline and Reliability Aware Multiserver Configuration Optimization for Maximizing Profit.
IEEE Trans. Parallel Distributed Syst., 2022

Data-Driven Deep Supervision for Medical Image Segmentation.
IEEE Trans. Medical Imaging, 2022

FeFET Multi-Bit Content-Addressable Memories for In-Memory Nearest Neighbor Search.
IEEE Trans. Computers, 2022

Image Complexity Guided Network Compression for Biomedical Image Segmentation.
ACM J. Emerg. Technol. Comput. Syst., 2022

Computing-In-Memory Using Ferroelectrics: From Single- to Multi-Input Logic.
IEEE Des. Test, 2022

Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines.
CoRR, 2022

On the Reliability of Computing-in-Memory Accelerators for Deep Neural Networks.
CoRR, 2022

Experimentally realized memristive memory augmented neural network.
CoRR, 2022

QoS Guaranteed Resource Allocation for Coexisting eMBB and URLLC Traffic in 5G Industrial Networks.
Proceedings of the 28th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2022

Distributed Successive Packet Scheduling for Multi-Channel Real-Time Wireless Networks.
Proceedings of the 28th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2022

Data-Driven Deep Supervision for Skin Lesion Classification.
Proceedings of the Medical Image Computing and Computer Assisted Intervention - MICCAI 2022, 2022

Cleaved-Gate Ferroelectric FET for Reliable Multi-Level Cell Storage.
Proceedings of the IEEE International Reliability Physics Symposium, 2022

HARP: Hierarchical Resource Partitioning in Dynamic Industrial Wireless Networks.
Proceedings of the 42nd IEEE International Conference on Distributed Computing Systems, 2022

Computing-In-Memory Neural Network Accelerators for Safety-Critical Systems: Can Small Device Variations Be Disastrous?
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

COSIME: FeFET Based Associative Memory for In-Memory Cosine Similarity Search.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Associative Memory Based Experience Replay for Deep Reinforcement Learning.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

Eva-CAM: A Circuit/Architecture-Level Evaluation Tool for General Content Addressable Memories.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

SWIM: selective write-verify for computing-in-memory neural accelerators.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

ODHD: one-class brain-inspired hyperdimensional computing for outlier detection.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

iMARS: an in-memory-computing architecture for recommendation systems.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

An Analog Clock-free Compute Fabric base on Continuous-Time Dynamical System for Solving Combinatorial Optimization Problems.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

RADARS: Memory Efficient Reinforcement Learning Aided Differentiable Neural Architecture Search.
Proceedings of the 27th Asia and South Pacific Design Automation Conference, 2022

2021
Fully Distributed Packet Scheduling Framework for Handling Disturbances in Lossy Real-Time Wireless Networks.
IEEE Trans. Mob. Comput., 2021

A NAND-SPIN-Based Magnetic ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Learning-Based Modeling and Optimization for Real-Time System Availability.
IEEE Trans. Computers, 2021

Device-Circuit-Architecture Co-Exploration for Computing-in-Memory Neural Accelerators.
IEEE Trans. Computers, 2021

Guest editorial: Special issue on Real-Time Systems Symposium (RTSS).
Real Time Syst., 2021

In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective.
Proc. IEEE, 2021

DAC-SDC Low Power Object Detection Challenge for UAV Applications.
IEEE Trans. Pattern Anal. Mach. Intell., 2021

Deep Random Forest with Ferroelectric Analog Content Addressable Memory.
CoRR, 2021

Autonomous Systems Design - A Virtual Roundtable.
Computer, 2021

On the Reliability of In-Memory Computing: Impact of Temperature on Ferroelectric TCAM.
Proceedings of the 39th IEEE VLSI Test Symposium, 2021

APaS: An Adaptive Partition-Based Scheduling Framework for 6TiSCH Networks.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

Demo Abstract: A Full-Blown 6TiSCH Network with Partition-based Resource Management for Large-Scale Real-Time Wireless Applications.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

Application-driven Design Exploration for Dense Ferroelectric Embedded Non-volatile Memories.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

MIMHD: Accurate and Efficient Hyperdimensional Inference Using Multi-Bit In-Memory Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

A Flash-Based Multi-Bit Content-Addressable Memory with Euclidean Squared Distance.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2021

Objective-Dependent Uncertainty Driven Retinal Vessel Segmentation.
Proceedings of the 18th IEEE International Symposium on Biomedical Imaging, 2021

Low-Cost Sequential Logic Circuit Design Considering Single Event Double-Node Upsets and Single Event Transients.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021

ICCAD Tutorial Session Paper Ferroelectric FET Technology and Applications: From Devices to Systems.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

A Hybrid Optical-Electrical Analog Deep Learning Accelerator Using Incoherent Optical Signals.
Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

Towards scalable, secure, and smart mission-critical IoT systems: review and vision.
Proceedings of the EMSOFT '21: Proceedings of the 2021 International Conference on Embedded Software, Virtual Event, October 8, 2021

Exploiting FeFETs via Cross-Layer Design from In-memory Computing Circuits to Meta-Learning Applications.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

A Quantization Framework for Neural Network Adaption at the Edge.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

In-Memory Computing based Accelerator for Transformer Networks for Long Sequences.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

In-Memory Nearest Neighbor Search with FeFET Multi-Bit Content-Addressable Memories.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

INVITED: kCC-Net for Compression of Biomedical Image Segmentation Networks.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Uncertainty Modeling of Emerging Device based Computing-in-Memory Neural Accelerators with Application to Neural Architecture Search.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Attention-in-Memory for Few-Shot Learning with Configurable Ferroelectric FET Arrays.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

Cross-layer Design for Computing-in-Memory: From Devices, Circuits, to Architectures and Applications.
Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020
Computing-in-Memory for Performance and Energy-Efficient Homomorphic Encryption.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Editorial: A Message from the New Editor-in-Chief.
ACM Trans. Design Autom. Electr. Syst., 2020

Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories.
IEEE Trans. Circuits Syst., 2020

Meshed Bluetree: Time-Predictable Multimemory Interconnect for Multicore Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Improving Reliability of Soft Real-Time Embedded Systems on Integrated CPU and GPU Platforms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Online Resource Management for Improving Reliability of Real-Time Systems on "Big-Little" Type MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

SearcHD: A Memory-Centric Hyperdimensional Computing With Stochastic Training.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Co-scheduling aperiodic real-time tasks with end-to-end firm and soft deadlines in two-stage systems.
Real Time Syst., 2020

Toward Privacy-Aware Task Allocation in Social Sensing-Based Edge Computing Systems.
IEEE Internet Things J., 2020

Algorithmic Acceleration of B/FV-like Somewhat Homomorphic Encryption for Compute-Enabled RAM.
IACR Cryptol. ePrint Arch., 2020

The Impact of Ferroelectric FETs on Digital and Analog Circuits and Architectures.
IEEE Des. Test, 2020

Accelerating a continuous-time analog SAT solver using GPUs.
Comput. Phys. Commun., 2020

Towards Privacy-aware Task Allocation in Social Sensing based Edge Computing Systems.
CoRR, 2020

FeCAM: A Universal Compact Digital and Analog Content Addressable Memory Using Ferroelectric.
CoRR, 2020

GC-eDRAM design using hybrid FinFET/NC-FinFET.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

Embedding error correction into crossbars for reliable matrix vector multiplication using emerging devices.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020

Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Hybrid FeMFET-CMOS Analog Synapse Circuit for Neural Network Training and Inference.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Data-Aware Deep Supervised Method for Retinal Vessel Segmentation.
Proceedings of the 17th IEEE International Symposium on Biomedical Imaging, 2020

Temperature Dependence and Temperature-Aware Sensing in Ferroelectric FET.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Impact of Extrinsic Variation Sources on the Device-to-Device Variation in Ferroelectric FET.
Proceedings of the 2020 IEEE International Reliability Physics Symposium, 2020

Seed-and-Vote based In-Memory Accelerator for DNA Read Mapping.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Fixed-Priority Scheduling and Controller Co-Design for Time-Sensitive Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

MNSIM 2.0: A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

Modeling and Benchmarking Computing-in-Memory for Design Space Exploration.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

AxR-NN: Approximate Computation Reuse for Energy-Efficient Convolutional Neural Networks.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

A Novel TIGFET-based DFF Design for Improved Resilience to Power Side-Channel Attacks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

A Fast and Energy Efficient Computing-in-Memory Architecture for Few-Shot Learning Applications.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Emerging Neural Workloads and Their Impact on Hardware.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Nonvolatile and Energy-Efficient FeFET-Based Multiplier for Energy-Harvesting Devices.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Ferroelectric FETs-Based Nonvolatile Logic-in-Memory Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2019

moDNN: Memory Optimal Deep Neural Network Training on Graphics Processing Units.
IEEE Trans. Parallel Distributed Syst., 2019

Distributed Dynamic Packet Scheduling Framework for Handling Disturbances in Real-Time Wireless Networks.
IEEE Trans. Mob. Comput., 2019

Introduction to the Special Issue on Real-Time aspects in Cyber-Physical Systems.
ACM Trans. Cyber Phys. Syst., 2019

An Ultra-Dense 2FeFET TCAM Design Based on a Multi-Domain FeFET Model.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Power and Area Efficient FPGA Building Blocks Based on Ferroelectric FETs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Resource Management for Improving Soft-Error and Lifetime Reliability of Real-Time MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Game Theoretic Feedback Control for Reliability Enhancement of EtherCAT-Based Networked Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Affinity-Driven Modeling and Scheduling for Makespan Optimization in Heterogeneous Multiprocessor Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Improving Availability of Multicore Real-Time Systems Suffering Both Permanent and Transient Faults.
IEEE Trans. Computers, 2019

A Mixed Signal Architecture for Convolutional Neural Networks.
ACM J. Emerg. Technol. Comput. Syst., 2019

A Survey on Architecture Advances Enabled by Emerging Beyond-CMOS Technologies.
IEEE Des. Test, 2019

Guest Editors' Introduction: Special Issue on Architecture Advances Enabled by Emerging Technologies.
IEEE Des. Test, 2019

Future Automotive HW/SW Platform Design (Dagstuhl Seminar 19502).
Dagstuhl Reports, 2019

Nonvolatile Spintronic Memory Cells for Neural Networks.
CoRR, 2019

Application-level Studies of Cellular Neural Network-based Hardware Accelerators.
CoRR, 2019

Eva-CiM: A System-Level Energy Evaluation Framework for Computing-in-Memory Architectures.
CoRR, 2019

Ferroelectric FET Based TCAM Designs for Energy Efficient Computing.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Accelerating Deep Neural Networks in Processing-in-Memory Platforms: Analog or Digital Approach?
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

CC-NET: Image Complexity Guided Network Compression for Biomedical Image Segmentation.
Proceedings of the 16th IEEE International Symposium on Biomedical Imaging, 2019

A Uniform Modeling Methodology for Benchmarking DNN Accelerators.
Proceedings of the International Conference on Computer-Aided Design, 2019

The Impact of Emerging Technologies on Architectures and System-level Management: Invited Paper.
Proceedings of the International Conference on Computer-Aided Design, 2019

Ferroelectric FET Based In-Memory Computing for Few-Shot Learning.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

Reliable Dynamic Packet Scheduling over Lossy Real-Time Wireless Networks.
Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

An Energy Efficient Non-Volatile Flip-Flop based on CoMET Technology.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

CE-Based Optimization for Real-time System Availability under Learned Soft Error Rate.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Design of Hardware-Friendly Memory Enhanced Neural Networks.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Efficient Analog Circuits for Boolean Satisfiability.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Cost-Constrained QoS Optimization for Approximate Computation Real-Time Tasks in Heterogeneous MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Cross-layer efforts for energy-efficient computing: towards peta operations per second per watt.
Frontiers Inf. Technol. Electron. Eng., 2018

Roundtable: Machine Learning for Embedded Systems: Hype or Lasting Impact?
IEEE Des. Test, 2018

The 55th Design Automation Conference.
IEEE Des. Test, 2018

Can beyond-CMOS devices illuminate dark silicon?
Commun. ACM, 2018

A Real-Time and Non-Cooperative Task Allocation Framework for Social Sensing Applications in Edge Computing Systems.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2018

FD-PaS: A Fully Distributed Packet Scheduling Framework for Handling Disturbances in Real-Time Wireless Networks.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2018

Demo Abstract: 6TiSCH in Full Bloom: From Dynamic Resource Management to Cloud-Based Network Analytics.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2018

Computing in memory with FeFETs.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Nonvolatile Lookup Table Design Based on Ferroelectric Field-Effect Transistors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Emerging reconfigurable nanotechnologies: can they support future electronics?
Proceedings of the International Conference on Computer-Aided Design, 2018

A Cross-Layer Perspective for Energy Efficient Processing: - From beyond-CMOS Devices to Deep Learning.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

Cooperative-Competitive Task Allocation in Edge Computing for Delay-Sensitive Social Sensing.
Proceedings of the 2018 IEEE/ACM Symposium on Edge Computing, 2018

Variation-aware task allocation and scheduling for improving reliability of real-time MPSoCs.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Improving reliability for real-time systems through dynamic recovery.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Feedback control of real-time EtherCAT networks for reliability enhancement in CPS.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Design and optimization of FeFET-based crossbars for binary convolution neural networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

moDNN: Memory optimal DNN training on GPUs.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Cache-aware task scheduling for maximizing control performance.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Computing with ferroelectric FETs: Devices, models, systems, and applications.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Quantization of Fully Convolutional Networks for Accurate Biomedical Image Segmentation.
Proceedings of the 2018 IEEE Conference on Computer Vision and Pattern Recognition, 2018

Biomedical Image Segmentation Using Fully Convolutional Networks on TrueNorth.
Proceedings of the 31st IEEE International Symposium on Computer-Based Medical Systems, 2018

2017
DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Improving System-Level Lifetime Reliability of Multicore Soft Real-Time Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2017

PeaPaw: Performance and Energy-Aware Partitioning of Workload on Heterogeneous Platforms.
ACM Trans. Design Autom. Electr. Syst., 2017

Tunnel FET Current Mode Logic for DPA-Resilient Circuit Designs.
IEEE Trans. Emerg. Top. Comput., 2017

iCETD: An improved tag generation design for memory data authentication in embedded processor systems.
Integr., 2017

Distributed Dynamic Packet Scheduling for Handling Disturbances in Real-Time Wireless Networks.
Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

Demo Abstract: A Cross-Device Testing and Reporting System for Large-Scale Real-Time Wireless Networks.
Proceedings of the 2017 IEEE Real-Time and Embedded Technology and Applications Symposium, 2017

An analog SAT solver based on a deterministic dynamical system: (Invited paper).
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Edge segmentation: Empowering mobile telemedicine with compressed cellular neural networks.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Exploiting Non-Volatility for Information Processing.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

A Spin-Orbit Torque based Cellular Neural Network (CNN) Architecture.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Energy-adaptive scheduling of imprecise computation tasks for QoS optimization in real-Time MPSoC systems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Design and benchmarking of ferroelectric FET based TCAM.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Advanced spintronic memory and logic for non-volatile processors.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

An on-line framework for improving reliability of real-time systems on "big-little" type MPSoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Cellular neural network friendly convolutional neural networks - CNNs with CNNs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited.
Proceedings of the 54th Annual Design Automation Conference, 2017

Optimizing Memory Efficiency for Convolution Kernels on Kepler GPUs.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
A C2RTL Framework Supporting Partition, Parallelization, and FIFO Sizing for Streaming Applications.
ACM Trans. Design Autom. Electr. Syst., 2016

Thermal-Aware Task Scheduling for Energy Minimization in Heterogeneous Real-Time MPSoC Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Guest Editorial Leveraging Design Automation Techniques for Cyber-Physical System Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

Shell: A Spatial Decomposition Data Structure for Ray Traversal on GPU.
IEEE Trans. Computers, 2016

Emerging Technology-Based Design of Primitives for Hardware Security.
ACM J. Emerg. Technol. Comput. Syst., 2016

Transforming Real-Time Task Graphs to Improve Schedulability.
Proceedings of the 22nd IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2016

Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Privacy protection via appliance scheduling in smart homes.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Enhancing Hardware Security with Emerging Transistor Technologies.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Design of latches and flip-flops using emerging tunneling devices.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Using emerging technologies for hardware security beyond PUFs.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Balancing lifetime and soft-error reliability to improve system availability.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

Improving tag generation for memory data authentication in embedded processor systems.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015
Analog Circuit Design Using Tunnel-FETs.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Local-Deadline Assignment for Distributed Real-Time Systems.
IEEE Trans. Computers, 2015

Utilization-based admission control for aperiodic tasks under EDF scheduling.
Real Time Syst., 2015

PerDome: a performance model for heterogeneous computing systems.
Proceedings of the Symposium on High Performance Computing, 2015

Inter-cell Channel Time-Slot Scheduling for Multichannel Multiradio Cellular Fieldbuses.
Proceedings of the 2015 IEEE Real-Time Systems Symposium, 2015

Emulating massively parallel non-Boolean operators on FPGA.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Reliable and high performance STT-MRAM architectures based on controllable-polarity devices.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Analytically Modeling Power and Performance of a CNN System.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

Monte Carlo Based Ray Tracing in CPU-GPU Heterogeneous Systems and Applications in Radiation Therapy.
Proceedings of the 24th International Symposium on High-Performance Parallel and Distributed Computing, 2015

Improving Lifetime of Multicore Soft Real-Time Systems through Global Utilization Control.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

TFET-based Operational Transconductance Amplifier Design for CNN Systems.
Proceedings of the 25th edition on Great Lakes Symposium on VLSI, GLVLSI 2015, Pittsburgh, PA, USA, May 20, 2015

On-Line Data Link Layer Scheduling in Wireless Networked Control Systems.
Proceedings of the 27th Euromicro Conference on Real-Time Systems, 2015

A CNN-inspired mixed signal processor based on tunnel transistors.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Towards systematic design of 3D pNML layouts.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

An online wear state monitoring methodology for off-the-shelf embedded processors.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014
Nanomagnet Logic (NML).
Proceedings of the Field-Coupled Nanocomputing - Paradigms, Progress, and Perspectives, 2014

PaCC: A Parallel Compare and Compress Codec for Area Reduction in Nonvolatile Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2014

Nontraditional Computation Using Beyond-CMOS Tunneling Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014

Understanding the landscape of accelerators for vision.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Architectural impacts of emerging transistors.
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Intra-task scheduling for storage-less and converter-less solar-powered nonvolatile sensor nodes.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Boolean circuit design using emerging tunneling devices.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Cellular neural networks for image analysis using steep slope devices.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

Design of 3D nanomagnetic logic circuits: A full-adder case study.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Impact of steep-slope transistors on non-von Neumann architectures: CNN case study.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Leveraging Emerging Technology for Hardware Security - Case Study on Silicon Nanowire FETs and Graphene SymFETs.
Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013
Guest Editorial Special Section on Power-Aware Design for Embedded Systems.
IEEE Trans. Ind. Informatics, 2013

GPU-optimized volume ray tracing for massive numbers of rays in radiotherapy.
ACM Trans. Embed. Comput. Syst., 2013

Accelerating radiation dose calculation: A multi-FPGA solution.
ACM Trans. Embed. Comput. Syst., 2013

Computation efficiency driven job removal policies for meeting end-to-end deadlines in distributed real-time systems.
Proceedings of the 16th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing, 2013

TFET-based cellular neural network architectures.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013

Shell: A Spatial Decomposition Data Structure for 3D Curve Traversal on Many-Core Architectures.
Proceedings of the Algorithms - ESA 2013, 2013

FPGA-implementation of a holographic pattern-matching algorithm.
Proceedings of the 21st European Conference on Circuit Theory and Design, 2013

Systematic design of nanomagnet logic circuits.
Proceedings of the Design, Automation and Test in Europe, 2013

Utilizing voltage-frequency islands in C-to-RTL synthesis for streaming applications.
Proceedings of the Design, Automation and Test in Europe, 2013

Enhancing multicore reliability through wear compensation in online assignment and scheduling.
Proceedings of the Design, Automation and Test in Europe, 2013

Minimum-energy state guided physical design for nanomagnet logic.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

Optimal partition with block-level parallelization in C-to-RTL synthesis for streaming applications.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

GPU acceleration of Data Assembly in Finite Element Methods and its energy implications.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2012
Energy Minimization for Multiprocessor Systems Executing Real-Time Tasks.
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012

A Reconfigurable PLA Architecture for Nanomagnet Logic.
ACM J. Emerg. Technol. Comput. Syst., 2012

WiP Abstract: Supporting Coordinated Negotiation in CPS Design.
Proceedings of the 2012 IEEE/ACM Third International Conference on Cyber-Physical Systems, 2012

Toward codesign in high performance computing systems.
Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design, 2012

On the Role of Co-design in High Performance Computing.
Proceedings of the Transition of HPC Towards Exascale Computing, 2012

Making non-volatile nanomagnet logic non-volatile.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

A cost-effective tag design for memory data authentication in embedded systems.
Proceedings of the 15th International Conference on Compilers, 2012

2011
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs.
IEEE Trans. Very Large Scale Integr. Syst., 2011

A Metric for Quantifying Similarity between Timing Constraint Sets in Real-Time Systems.
ACM Trans. Design Autom. Electr. Syst., 2011

Minimum Bandwidth Reservations for Periodic Streams in Wireless Real-Time Systems.
IEEE Trans. Mob. Comput., 2011

Performance and Energy Impact of Locally Controlled NML Circuits.
ACM J. Emerg. Technol. Comput. Syst., 2011

Shape Rectangularization Problems in Intensity-Modulated Radiation Therapy.
Algorithmica, 2011

Memory-efficient volume ray tracing on GPU for radiotherapy.
Proceedings of the IEEE 9th Symposium on Application Specific Processors, 2011

Meeting End-to-End Deadlines through Distributed Local Deadline Assignments.
Proceedings of the 32nd IEEE Real-Time Systems Symposium, 2011

An Online Holistic Scheduling Framework for Energy-Constrained Wireless Real-Time Systems.
Proceedings of the 17th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2011

Characterizing the L1 Data Cache's Vulnerability to Transient Errors in Chip-Multiprocessors.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Collapsed-cone based deformation field regularization for nonrigid image registration.
Proceedings of the 8th IEEE International Symposium on Biomedical Imaging: From Nano to Macro, 2011

Almost sure stability of networked control systems under exponentially bounded bursts of dropouts.
Proceedings of the 14th ACM International Conference on Hybrid Systems: Computation and Control, 2011

2010
Dynamic channel reservations for wireless multihop communications.
ACM SIGMOBILE Mob. Comput. Commun. Rev., 2010

Network-aware, energy-conscious, fair service for real-time applications on multiprocessor SoC.
SIGBED Rev., 2010

Design and comparison of NML systolic architectures.
Proceedings of the 2010 IEEE/ACM International Symposium on Nanoscale Architectures, 2010

Reducing Delay Jitter of Real-Time Control Tasks through Adaptive Deadline Adjustments.
Proceedings of the 22nd Euromicro Conference on Real-Time Systems, 2010

System-level reliability modeling for MPSoCs.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

Hardware/software co-design for high performance computing: challenges and opportunities.
Proceedings of the 8th International Conference on Hardware/Software Codesign and System Synthesis, 2010

2009
Generalized Elastic Scheduling for Real-Time Tasks.
IEEE Trans. Computers, 2009

Defects and faults in QCA-based PLAs.
ACM J. Emerg. Technol. Comput. Syst., 2009

Fixed-priority scheduling to reduce both the dynamic and leakage energy on variable voltage processors.
Int. J. Embed. Syst., 2009

A multi-FPGA accelerator for radiation dose calculation in cancer treatment.
Proceedings of the IEEE 7th Symposium on Application Specific Processors, 2009

A Metric for Judicious Relaxation of Timing Constraints in Soft Real-Time Systems.
Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009

Energy-Conscious Co-scheduling of Tasks and Packets in Wireless Real-Time Environments.
Proceedings of the 15th IEEE Real-Time and Embedded Technology and Applications Symposium, 2009

System-level energy and performance projections for nanomagnet-based logic.
Proceedings of the 2009 IEEE/ACM International Symposium on Nanoscale Architectures, 2009

Online work maximization under a peak temperature constraint.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

Controlling Magnetic Circuits: How Clock Structure Implementation will Impact Logical Correctness and Power.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008
Molecular QCA design with chemically reasonable constraints.
ACM J. Emerg. Technol. Comput. Syst., 2008

A Flexible Framework for Communication Evaluation in SoC Design.
Int. J. Parallel Program., 2008

Mountain Reduction, Block Matching, and Applications in Intensity-Modulated Radiation Therapy.
Int. J. Comput. Geom. Appl., 2008

Defect tolerance in QCA-based PLAs.
Proceedings of the 2008 IEEE International Symposium on Nanoscale Architectures, 2008

Bridging the gap between nanomagnetic devices and circuits.
Proceedings of the 26th International Conference on Computer Design, 2008

Temperature-aware test scheduling for multiprocessor systems-on-chip.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Wireless channel access reservation for embedded real-time systems.
Proceedings of the 8th ACM & IEEE International conference on Embedded software, 2008

Period and Deadline Selection for Schedulability in Real-Time Systems.
Proceedings of the 20th Euromicro Conference on Real-Time Systems, 2008

Fabrication Variations and Defect Tolerance for Nanomagnet-Based QCA.
Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

Design and defect tolerance beyond CMOS.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

2007
Transition-overhead-aware voltage scheduling for fixed-priority real-time systems.
ACM Trans. Design Autom. Electr. Syst., 2007

Energy efficient DVS schedule for fixed-priority real-time systems.
ACM Trans. Embed. Comput. Syst., 2007

Fabricatable Interconnect and Molecular QCA Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Searching for multiobjective preventive maintenance schedules: Combining preferences with evolutionary algorithms.
Eur. J. Oper. Res., 2007

Approximating the Maximum Sharing Problem.
Proceedings of the Algorithms and Data Structures, 10th International Workshop, 2007

Network-Aware Dynamic Voltage and Frequency Scaling.
Proceedings of the 13th IEEE Real-Time and Embedded Technology and Applications Symposium, 2007

Clocking structures and power analysis for nanomagnet-based logic devices.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

On Self-triggered Full-Information H-Infinity Controllers.
Proceedings of the Hybrid Systems: Computation and Control, 10th International Workshop, 2007

Fault Models and Yield Analysis for QCA-based PLAs.
Proceedings of the FPL 2007, 2007

Hardware Acceleration for 3-D Radiation Dose Calculation.
Proceedings of the IEEE International Conference on Application-Specific Systems, 2007

2006
Distance-based recent use (DRU): an enhancement to instruction cache replacement policies for transition energy reduction.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Firm Real-Time System Scheduling Based on a Novel QoS Constraint.
IEEE Trans. Computers, 2006

Generalized Geometric Approaches for Leaf Sequencing Problems in Radiation Therapy.
Int. J. Comput. Geom. Appl., 2006

Generalized Elastic Scheduling.
Proceedings of the 27th IEEE Real-Time Systems Symposium (RTSS 2006), 2006

PLAs in Quantum-dot Cellular Automata.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

Shape Rectangularization Problems in Intensity-Modulated Radiation Therapy.
Proceedings of the Algorithms and Computation, 17th International Symposium, 2006

Using CAD to shape experiments in molecular QCA.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

An FPGA Solution for Radiation Dose Calculation.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006

Signature-based workload estimation for mobile 3D graphics.
Proceedings of the 43rd Design Automation Conference, 2006

A Leaf Sequencing Software for Intensity-Modulated Radiation Therapy.
Proceedings of the 19th IEEE International Symposium on Computer-Based Medical Systems (CBMS 2006), 2006

Methods for power optimization in distributed embedded systems with real-time requirements.
Proceedings of the 2006 International Conference on Compilers, 2006

2005
Energy-aware variable partitioning and instruction scheduling for multibank memory architectures.
ACM Trans. Design Autom. Electr. Syst., 2005

Hardware/software codesign for DSP (from the Guest Editor).
IEEE Signal Process. Mag., 2005

Optimal Terrain Construction Problems and Applications in Intensity-Modulated Radiation Therapy.
Algorithmica, 2005

Practical On-line DVS Scheduling for Fixed-Priority Real-Time Systems.
Proceedings of the 11th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS 2005), 2005

Scheduling Tasks with Markov-Chain Based Constraints.
Proceedings of the 17th Euromicro Conference on Real-Time Systems (ECRTS 2005), 2005

Exploiting Dynamic Workload Variation in Low Energy Preemptive Task Scheduling.
Proceedings of the 2005 Design, 2005

Mountain reduction, block matching, and applications in intensity-modulated radiation therapy.
Proceedings of the 21st ACM Symposium on Computational Geometry, 2005

2004
A unified approach to variable voltage scheduling for nonideal DVS processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Geometric algorithms for static leaf sequencing problems in radiation therapy.
Int. J. Comput. Geom. Appl., 2004

Fixed Priority Scheduling for Reducing Overall Energy on Variable Voltage Processors.
Proceedings of the 25th IEEE Real-Time Systems Symposium (RTSS 2004), 2004

Exploiting Dynamic Workload Variation in Offline Low Energy Voltage Scheduling.
Proceedings of the Integrated Circuit and System Design, 2004

Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks.
Proceedings of the 2004 Design, 2004

Quantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions.
Proceedings of the 41th Design Automation Conference, 2004

2003
Minimal energy fixed-priority scheduling for variable voltage processors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Computing Optimal Beams in Two and Three Dimensions.
J. Comb. Optim., 2003

Finding an optimal path without growing the tree.
J. Algorithms, 2003

Guest Editors' Introduction: Taking on the Embedded System Design Challenge.
Computer, 2003

LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction Caches.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Energy minimization of real-time tasks on variable voltage processors with transition energy overhead.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

Register aware scheduling for distributed cache clustered architecture.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

SEA: fast power estimation for micro-architectures.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Efficient global register allocation for minimizing energy consumption.
ACM SIGPLAN Notices, 2002

Cell selection from technology libraries for minimizing power.
Integr., 2002

Optimal Polygon Cover Problems and Applications.
Int. J. Comput. Geom. Appl., 2002

Processor Utilization Bounds for Real-Time Systems With Precedence Constraints.
Des. Autom. Embed. Syst., 2002

A realistic variable voltage scheduling model for real-time applications.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Minimum Energy Fixed-Priority Scheduling for Variable Voltage Processor.
Proceedings of the 2002 Design, 2002

Task scheduling and voltage selection for energy minimization.
Proceedings of the 39th Design Automation Conference, 2002

2001
Estimating probabilistic timing performance for real-time embedded systems.
IEEE Trans. Very Large Scale Integr. Syst., 2001

Efficient list-approximation techniques for floorplan area minimization.
ACM Trans. Design Autom. Electr. Syst., 2001

Determining an Optimal Penetration Among Weighted Regions in Two and Three Dimensions.
J. Comb. Optim., 2001

Linear-time Matrix Transpose Algorithms Using Vector Register File With Diagonal Registers.
Proceedings of the 15th International Parallel & Distributed Processing Symposium (IPDPS-01), 2001

Efficient Performance Estimation for General Real-Time Task Systems.
Proceedings of the 2001 IEEE/ACM International Conference on Computer-Aided Design, 2001

Energy Efficient Fixed-Priority Scheduling for Real-Time Systems on Variable Voltage Processors.
Proceedings of the 38th Design Automation Conference, 2001

Algorithms for congruent sphere packing and applications.
Proceedings of the Seventeenth Annual Symposium on Computational Geometry, 2001

Maximum Red/Blue Interval Matching with Applications.
Proceedings of the Computing and Combinatorics, 7th Annual International Conference, 2001

Combined partitioning and data padding for scheduling multiple loop nests.
Proceedings of the 2001 International Conference on Compilers, 2001

2000
Efficient design exploration based on module utility selection.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Efficient module selections for finding highly acceptable designs based on inclusion scheduling.
J. Syst. Archit., 2000

Multi-Valued Performance Metrics for Real-Time Embedded Systems.
Des. Autom. Embed. Syst., 2000

Enhanced Fixed-Priority Scheduling with (m, k)-Firm Guarantee.
Proceedings of the 21st IEEE Real-Time Systems Symposium (RTSS 2000), 2000

Optimal Beam Penetrations in Two and Three Dimensions.
Proceedings of the Algorithms and Computation, 11th International Conference, 2000

Optimal Polygon Cover Problems and Applcations.
Proceedings of the Algorithms and Computation, 11th International Conference, 2000

Efficient algorithms for acceptable design exploration.
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000

Fast performance prediction for periodic task systems.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

Modeling epistatic interactions in fitness landscapes.
Proceedings of the 2000 Congress on Evolutionary Computation, 2000

1999
Global register allocation for minimizing energy consumption.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

Low energy register allocation beyond basic blocks.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Preference-Driven Hierarchical Hardware/Software Partitioning.
Proceedings of the IEEE International Conference On Computer Design, 1999

Efficient Algorithms for Finding Highly Acceptable Designs Based on Module-Utility Selections.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

A Framework for User Assisted Design Space Exploration.
Proceedings of the 36th Conference on Design Automation, 1999

A probabilistic performance metric for real-time system design.
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999

1997
Hardware-Software Partitioning for Real-Time Embedded Systems.
Des. Autom. Embed. Syst., 1997

Scheduling for power reduction in a real-time system.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

Predicting Timing Behavior in Architectural Design Exploration of Real-Time Embedded Systems.
Proceedings of the 34st Conference on Design Automation, 1997

1996
Fast and Efficient Operations on Parallel Priority Queues.
Parallel Process. Lett., 1996

An Evolutionary Approach to Hardware/ Software Partitioning.
Proceedings of the Parallel Problem Solving from Nature, 1996

Fitness Functions for Multiple Objective Optimization Problems: Combining Preferences with Pareto Rankings.
Proceedings of the 4th Workshop on Foundations of Genetic Algorithms. San Diego, 1996

Efficient Approximation Algorithms for Floorplan Area Minimization.
Proceedings of the 33st Conference on Design Automation, 1996

1994
Minimizing the number of delay buffers in the synchronization of pipelined systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994

Codesign of architectures for automotive powertrain modules.
IEEE Micro, 1994

Configuration-level hardware/software partitioning for real-time embedded systems.
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994

1993
An Efficient Implementation of Singular Value Decomposition Rotation Transformations with CORDIC Processors.
J. Parallel Distributed Comput., 1993

A neglected error source in the CORDIC algorithm.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1991
Expanding the Range of Convergence of the CORDIC Algorithm.
IEEE Trans. Computers, 1991

1988
The application of bit-serial CORDIC computational units to the design of inverse kinematics processors.
Proceedings of the 1988 IEEE International Conference on Robotics and Automation, 1988


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