Xiao Yang

Affiliations:
  • Princeton University, Department of Electrical Engineering, NJ, USA


According to our database1, Xiao Yang authored at least 8 papers between 2000 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2008
Alternative application-specific processor architectures for fast arbitrary bit permutations.
Int. J. Embed. Syst., 2008

2005
Single-Cycle Bit Permutations with MOMR Execution.
J. Comput. Sci. Technol., 2005

2004
PLX FP: an efficient floating-point instruction set for 3D graphics.
Proceedings of the 2004 IEEE International Conference on Multimedia and Expo, 2004

Validating Word-Oriented Processors for Bit and Multi-word Operations.
Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2003
Arbitrary Bit Permutations in One or Two Cycles.
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002
Refining Instruction Set Architecture for High-Performance Multimedia Processing in Constrained Environments.
Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

2001
Cryptography Efficient Permutation Instructions for Fast Software.
IEEE Micro, 2001

2000
Fast Subword Permutation Instructions Using Omega and Flip Network Stages.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000


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