Xiao-Tao Chen

According to our database1, Xiao-Tao Chen authored at least 16 papers between 1995 and 2001.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2001
Novel Approaches for Fault Detection in Two-Dimensional Combinational Arrays.
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001

1999
Test generation and scheduling for layout-based detection of bridge faults in interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 1999

Reconfiguring one-time programmable FPGAs.
IEEE Micro, 1999

Design Verification of FPGA Implementations.
IEEE Des. Test Comput., 1999

Reconfiguration of One-Time Programmable FPGAs with Faulty Logic Resources.
Proceedings of the 14th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '99), 1999

1998
Testing configurable LUT-based FPGA's.
IEEE Trans. Very Large Scale Integr. Syst., 1998

Structural diagnosis of interconnects by coloring.
ACM Trans. Design Autom. Electr. Syst., 1998

1997
On the Fault Coverage of Interconnect Diagnosis.
Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

On the multiple fault diagnosis of multistage interconnection networks: the lower bound and the CMOS fault model.
Proceedings of the 1997 International Conference on Parallel Processing (ICPP '97), 1997

Using Virtual Links for Reliable Information Retrieval Across Point-to-Point Networks.
Proceedings of the Digest of Papers: FTCS-27, 1997

1996
On the diagnosis of programmable interconnect systems: Theory and application.
Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

A coloring approach to the structural diagnosis of interconnects.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Diagnosing Programmable Interconnect Systems for FPGAs.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

Layout-driven detection of bridge faults in interconnects.
Proceedings of the 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1996

1995
Accurate communication models for task scheduling in multicomputers.
Proceedings of the Seventh IEEE Symposium on Parallel and Distributed Processing, 1995

A row-based FPGA for single and multiple stuck-at fault detection.
Proceedings of the 1995 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 1995


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