Xiangyu Zhang

According to our database, Xiangyu Zhang authored at least 25 papers between 2016 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

RAW Images-Based Motion-Assisted Object Detection Accelerator Using Deformable Parts Models Features on 1080p Videos.

Ling Zhang, Haoyan Li, Xiangyu Zhang, Xin Lou

IEEE Trans. Circuits Syst. I Regul. Pap., November, 2024

FPGA Accelerator for Human Activity Recognition Based on Radar.

Kangjie Long, Chaolin Rao, Xiangyu Zhang, Wenbin Ye, Xin Lou

IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A Multi-scale Block PatchMatch-based Unified Algorithm for Efficient 6-D Vision Processing.

Hongyu Wang, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

An Efficient Frequency Domain Vision Pipeline From RAW Images to Backend Tasks.

Haoyan Li, Wei Zhou, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Image Frequency Separation Residual Network for End-to-end RAW to RGB Mapping.

Mengchuan Dong, Wei Zhou, Cong Pang, Xiangyu Zhang, Xin Lou

Proceedings of the 5th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2023

2022

A Raw Image-Based End-to-End Object Detection Accelerator Using HOG Features.

Xiangyu Zhang, Ling Zhang, Xin Lou

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

A Block PatchMatch-Based Energy-Resource Efficient Stereo Matching Processor on FPGA.

Hongyu Wang, Wei Zhou, Xiangyu Zhang, Xin Lou

IEEE Trans. Circuits Syst. I Regul. Pap., 2022

An End-to-end Computer Vision System Architecture.

Ling Zhang, Wei Zhou, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

A 39pJ/label 1920x1080 165.7 FPS Block PatchMatch Based Stereo Matching Processor on FPGA.

Hongyu Wang, Wei Zhou, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE Custom Integrated Circuits Conference, 2022

FPGA Accelerator for Radar-Based Human Activity Recognition.

Kangjie Long, Chaolin Rao, Xiangyu Zhang, Wen Bin Ye, Xin Lou

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

Spatial Non-Maximum Suppression for Object Detection using Correlation and Dynamic Thresholds.

Xiangyu Zhang, Wenyan Su, Juan Li, Jingwei Li, Xin Lou

Proceedings of the 18th International SoC Design Conference, 2021

Stereo Point Cloud Refinement for 3D Object Detection.

Wangchao Liu, Teng Wang, Yang Wang, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

Robust Multi-Source Direction of Arrival Estimation Using a Single Acoustic Vector Sensor.

Jianhua Geng, Sifan Wang, Juan Li, Jingwei Li, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

Motion Assisted Video-based Stereo Matching.

Shengyu Gao, Hongyu Wang, Teng Wang, Yang Wang, Xiangyu Zhang, Xin Lou

Proceedings of the IEEE Asia Pacific Conference on Circuit and Systems, 2021

2019

Energy-Efficient Hardware Implementation of Road-Lane Detection Based on Hough Transform with Parallelized Voting Procedure and Local Maximum Algorithm.

Jungang Guan, Fengwei An, Xiangyu Zhang, Lei Chen, Hans Jürgen Mattausch

IEICE Trans. Inf. Syst., 2019

A Hardware-Efficient Recognition Accelerator Using Haar-Like Feature and SVM Classifier.

Aiwen Luo, Fengwei An, Xiangyu Zhang, Hans Jürgen Mattausch

IEEE Access, 2019

2018

Resource-Efficient Object-Recognition Coprocessor With Parallel Processing of Multiple Scan Windows in 65-nm CMOS.

Aiwen Luo, Fengwei An, Xiangyu Zhang, Lei Chen, Hans Jürgen Mattausch

IEEE Trans. Very Large Scale Integr. Syst., 2018

A Hardware Architecture for Cell-Based Feature-Extraction and Classification Using Dual-Feature Space.

Fengwei An, Xiangyu Zhang, Aiwen Luo, Lei Chen, Hans Jürgen Mattausch

IEEE Trans. Circuits Syst. Video Technol., 2018

A Modular and Reconfigurable Pipeline Architecture for Learning Vector Quantization.

Xiangyu Zhang, Fengwei An, Lei Chen, Idaku Ishii, Hans Jürgen Mattausch

IEEE Trans. Circuits Syst. I Regul. Pap., 2018

2017

Real-Time Straight-Line Detection for XGA-Size Videos by Hough Transform with Parallelized Voting Procedures.

Jungang Guan, Fengwei An, Xiangyu Zhang, Lei Chen, Hans Jürgen Mattausch

Sensors, 2017

A Vector-Quantization Compression Circuit With On-Chip Learning Ability for High-Speed Image Sensor.

Zunkai Huang, Xiangyu Zhang, Lei Chen, Yongxin Zhu, Fengwei An, Hui Wang, Songlin Feng

IEEE Access, 2017

Object-recognition VLSI for pedestrian detection in automotive applications.

Fengwei An, Xiangyu Zhang, Lei Chen, Idaku Ishii

Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016

A Memory-Based Modular Architecture for SOM and LVQ with Dynamic Configuration.

Fengwei An, Xiangyu Zhang, Lei Chen, Hans Jürgen Mattausch

IEEE Trans. Multi Scale Comput. Syst., 2016

Dynamically reconfigurable system for LVQ-based on-chip learning and recognition.

Fengwei An, Xiangyu Zhang, Lei Chen, Hans Jürgen Mattausch

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Pixel-based pipeline hardware architecture for high-performance Haar-like feature extraction.

Yuki Fujita, Fengwei An, Aiwen Luo, Xiangyu Zhang, Lei Chen, Hans Jürgen Mattausch

Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016