Xiangyu Dong

Orcid: 0009-0009-6312-8160

According to our database1, Xiangyu Dong authored at least 57 papers between 2008 and 2024.

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Bibliography

2024
Learning-Based Attribute-Augmented Proximity Matrix Factorization for Attributed Network Embedding.
IEEE Trans. Knowl. Data Eng., November, 2024

Vertical Distribution of Water Vapor During Haze Processes in Northeast China Based on Raman Lidar Measurements.
Remote. Sens., October, 2024

Dual consistency-driven group decision making method based on fuzzy preference relation.
Expert Syst. Appl., March, 2024

Exploring Video Denoising in Thermal Infrared Imaging: Physics-Inspired Noise Generator, Dataset, and Model.
IEEE Trans. Image Process., 2024

Robust Lidar-Radar Composite Cloud Boundary Detection Method With Rainfall Pixels Removal.
IEEE Trans. Geosci. Remote. Sens., 2024

SmoothGNN: Smoothing-based GNN for Unsupervised Node Anomaly Detection.
CoRR, 2024

KPG: Key Propagation Graph Generator for Rumor Detection based on Reinforcement Learning.
CoRR, 2024

Rayleigh Quotient Graph Neural Networks for Graph-level Anomaly Detection.
Proceedings of the Twelfth International Conference on Learning Representations, 2024

2023
Why does Stereo Triangulation Not Work in UAV Distance Estimation.
CoRR, 2023

2022
Sort Planning of Multi-Fingered Dexterous Hands Using Deep Learning.
Proceedings of the 7th International Conference on Automation, 2022

2021
Impact of glacier changes in the Himalayan Plateau disaster.
Ecol. Informatics, 2021

Injecting Entity Types into Entity-Guided Text Generation.
Proceedings of the 2021 Conference on Empirical Methods in Natural Language Processing, 2021

Logic-Consistency Text Generation from Semantic Parses.
Proceedings of the Findings of the Association for Computational Linguistics: ACL/IJCNLP 2021, 2021

2020
Did You Ask a Good Question? A Cross-Domain Question Intention Classification Benchmark for Text-to-SQL.
CoRR, 2020

MedDialog: A Large-scale Medical Dialogue Dataset.
CoRR, 2020

A Multi-modal Graph Neural Network Approach to Traffic Risk Forecasting in Smart Urban Sensing.
Proceedings of the 17th Annual IEEE International Conference on Sensing, 2020

PQA-CNN: Towards Perceptual Quality Assured Single-Image Super-Resolution in Remote Sensing.
Proceedings of the 28th IEEE/ACM International Symposium on Quality of Service, 2020

Pairwise Learning for Name Disambiguation in Large-Scale Heterogeneous Academic Networks.
Proceedings of the 20th IEEE International Conference on Data Mining, 2020

MedDialog: Large-scale Medical Dialogue Datasets.
Proceedings of the 2020 Conference on Empirical Methods in Natural Language Processing, 2020

2019
A syntax-based learning approach to geo-locating abnormal traffic events using social sensing.
Proceedings of the ASONAM '19: International Conference on Advances in Social Networks Analysis and Mining, 2019

2014
Endurance-aware cache line management for non-volatile caches.
ACM Trans. Archit. Code Optim., 2014

Building and Optimizing MRAM-Based Commodity Memories.
ACM Trans. Archit. Code Optim., 2014

Preventing STT-RAM Last-Level Caches from Port Obstruction.
ACM Trans. Archit. Code Optim., 2014

Enabling high-performance LPDDRx-compatible MRAM.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

ProactiveDRAM: A DRAM-initiated retention management scheme.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Using multi-level cell STT-RAM for fast and energy-efficient local checkpointing.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014

2013
A circuit-architecture co-optimization framework for exploring nonvolatile memory hierarchies.
ACM Trans. Archit. Code Optim., 2013

A circuit-architecture co-optimization framework for evaluating emerging memory hierarchies.
Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems & Software, 2013

Low-current probabilistic writes for power-efficient STT-RAM caches.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

i<sup>2</sup>WAP: Improving non-volatile cache lifetime by reducing inter- and intra-set write variations.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

OAP: an obstruction-aware cache management policy for STT-RAM last-level caches.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Point and discard: a hard-error-tolerant architecture for non-volatile last level caches.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011
Influence of Stacked 3D Memory/Cache Architectures on GPUs.
Proceedings of the 3D Integration for NoC-based SoC Architectures, 2011

Hybrid checkpointing using emerging nonvolatile memories for future exascale systems.
ACM Trans. Archit. Code Optim., 2011

Stacking magnetic random access memory atop microprocessors: an architecture-level evaluation.
IET Comput. Digit. Tech., 2011

Three-dimensional Integrated Circuits: Design, EDA, and Architecture.
Found. Trends Electron. Des. Autom., 2011

Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs.
Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Energy-efficient multi-level cell phase-change memory system with data encoding.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

The study of shift strategy for pure electric bus without synchronizer.
Proceedings of the International Conference on Electronic and Mechanical Engineering and Information Technology, 2011

An energy-efficient 3D CMP design with fine-grained voltage scaling.
Proceedings of the Design, Automation and Test in Europe, 2011

Design implications of memristor-based RRAM cross-point structures.
Proceedings of the Design, Automation and Test in Europe, 2011

AdaMS: Adaptive MLC/SLC phase-change memory design for file storage.
Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

2010
Fabrication Cost Analysis and Cost-Aware Design Space Exploration for 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Simple but Effective Heterogeneous Main Memory with On-Chip Memory Controller Support.
Proceedings of the Conference on High Performance Computing Networking, 2010

Energy- and endurance-aware design of phase change memory caches.
Proceedings of the Design, Automation and Test in Europe, 2010

Cost-aware three-dimensional (3D) many-core multiprocessor design.
Proceedings of the 47th Design Automation Conference, 2010

Cost-driven 3D integration with interconnect layers.
Proceedings of the 47th Design Automation Conference, 2010

Energy and performance driven circuit design for emerging phase-change memory.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

Architectural benefits and design challenges for three-dimensional integrated circuits.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

3D memory stacking for fast checkpointing/restore applications.
Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009
Leveraging 3D PCRAM technologies to reduce checkpoint overhead for future exascale systems.
Proceedings of the ACM/IEEE Conference on High Performance Computing, 2009

3D GPU architecture using cache stacking: Performance, cost, power and thermal analysis.
Proceedings of the 27th International Conference on Computer Design, 2009

PCRAMsim: System-level performance, energy, and area modeling for Phase-Change RAM.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009

A novel architecture of the 3D stacked MRAM L2 cache for CMPs.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

System-level cost analysis and design exploration for three-dimensional integrated circuits (3D ICs).
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009

2008
Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement.
Proceedings of the 45th Design Automation Conference, 2008


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