Xiangqu Fu

According to our database, Xiangqu Fu authored at least 4 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity.

Hao Wu, Yong Chen, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang

IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

IG-CRM: Area/Energy-Efficient IGZO-Based Circuits and Architecture Design for Reconfigurable CIM/CAM Applications.

Zeyu Guo, Jinshan Yue, Shengzhe Yan, Zhuoyu Dai, Xiangqu Fu, Zhaori Cong, Zening Niu, Ke Hu, Lihua Xu, Jiawei Wang, Lingfei Wang, Guanhua Yang, Di Geng, Ling Li

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023

P³ ViT: A CIM-Based High-Utilization Architecture With Dynamic Pruning and Two-Way Ping-Pong Macro for Vision Transformer.

Xiangqu Fu, Qirui Ren, Hao Wu, Feibin Xiang, Qing Luo, Jinshan Yue, Yong Chen, Feng Zhang

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF.

Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak

IEEE Trans. Very Large Scale Integr. Syst., February, 2023