Xianghong Hu

Orcid: 0000-0002-1237-4945

According to our database¹, Xianghong Hu authored at least 18 papers between 2019 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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On csauthors.net:

Bibliography

2024

An End-to-End Deep-Learning-Based Indirect Time-of-Flight Image Signal Processor.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2023

High-performance Reconfigurable DNN Accelerator on a Bandwidth-limited Embedded System.

[BibT_eX]

[DOI]

ACM Trans. Embed. Comput. Syst., November, 2023

A Tiny Accelerator for Mixed-Bit Sparse CNN Based on Efficient Fetch Method of SIMO SPad.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, August, 2023

MFAI: A Scalable Bayesian Matrix Factorization Approach to Leveraging Auxiliary Information.

[BibT_eX]

[DOI]

CoRR, 2023

2022

TiNNA: A Tiny Accelerator for Neural Networks With Efficient DSP Optimization.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2022

A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator.

[BibT_eX]

[DOI]

Microelectron. J., 2022

An efficient loop tiling framework for convolutional neural network inference accelerators.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2022

A high speed processor for elliptic curve cryptography over NIST prime field.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2022

XPXP: improving polygenic prediction by cross-population and cross-phenotype analysis.

[BibT_eX]

[DOI]

Bioinform., 2022

SDQ: Stochastic Differentiable Quantization with Mixed Precision.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Machine Learning, 2022

An Efficient Parallel Architecture for Convolutional Neural Networks Accelerator on FPGAs.

[BibT_eX]

[DOI]

Proceedings of the HP3C 2022: 6th International Conference on High Performance Compilation, 2022

TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network.

[BibT_eX]

[DOI]

Proceedings of the 4th IEEE International Conference on Artificial Intelligence Circuits and Systems, 2022

2021

Subgraph feature extraction based on multi-view dictionary learning for graph classification.

[BibT_eX]

[DOI]

Knowl. Based Syst., 2021

Low-Power Reconfigurable Architecture of Elliptic Curve Cryptography for IoT.

[BibT_eX]

[DOI]

IEICE Trans. Electron., 2021

2020

The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Bayesian weighted Mendelian randomization for causal inference based on summary statistics.

[BibT_eX]

[DOI]

Bioinform., 2020

Modeling and Simulation of Energy Hub Considering Solid Oxide Fuel Cell and Power to Gas.

[BibT_eX]

[DOI]

Proceedings of the 46th Annual Conference of the IEEE Industrial Electronics Society, 2020

2019

A Resources-Efficient Configurable Accelerator for Deep Convolutional Neural Networks.

[BibT_eX]

[DOI]

IEEE Access, 2019

Xianghong Hu

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