Xi Chen

According to our database, Xi Chen authored at least 4 papers between 2015 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver.

Jiangfeng Wu, Giuseppe Cusmai, Acer Wei-Te Chou, Tao Wang, Bo Shen, Vijayaramalingam Periasamy, Ming-Hung Hsieh, Chun-Ying Chen, Lin He, Loke Kun Tan, Aravind Padyana, Vincent Cheng-Hsun Yang, Gregory Unruh, Jackie Koon Lun Wong, Bryan Juo-Jung Hung, Massimo Brandolini, Maco Sha-Ting Lin, Xi Chen, Yen Ding, Yen-Jen Ko, Young J. Shin, Ada Hing T. Hung, Binning Chen, Cynthia Dang, Deepak Lakshminarasimhan, Iris Hong Liu, Jerry Lin, Kowen Lai, Larry Wassermann, Ayaskant Shrivastava, Chi-Ming Hsiao, Chun-Sheng Huang, Jianlong Chen, Lakshminarasimhan Krishnan, Ning-Yi Wang, Pin-En Su, Tianwei Li, Wei-Ta Shih, Yau-Cheng Yang, Peter Cangiane, Randall Perlow, William Ngai, Hanson Hung-Sen Huang, James Y. C. Chang, Xicheng Jiang, Ardie G. Venes, Ramon Ray Gomez

IEEE J. Solid State Circuits, 2016

A 180 mW multistandard TV tuner in 28 nm CMOS.

Jianhong Xiao, Weinan Gao, Xiaojing Xu, Dave S.-H. Chang, Jiang Cao, Runhua Sun, Vijay Periasamy, Ning-Yi Wang, Xi Chen, Greg Unruh, Takayuki Hayashi, Tai-Hong Chih, Lakshminarasimhan Krishnan, Kuo-Ken Huang, Sunny Raj Dommaraju, Guowen Wei, Bo Shen, Ardie G. Venes, Dongsoo Koh, James Y. C. Chang

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

27.6 A 4GS/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS.

Jiangfeng Wu, Acer Wei-Te Chou, Tianwei Li, Rong Wu, Tao Wang, Giuseppe Cusmai, Sha-Ting Lin, Cheng-Hsun Yang, Greg Unruh, Sunny Raj Dommaraju, Mo M. Zhang, Po Tang Yang, Wei-Ting Lin, Xi Chen, Dongsoo Koh, Qingqi Dou, Hemasundar Mohan Geddada, Juo-Jung Hung, Massimo Brandolini, Young Shin, Hung Sen Huang, Chun-Ying Chen, Ardie G. Venes

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

A 2.7mW/Channel 48-to-1000MHz Direct Sampling Full-Band Cable Receiver.

Jiangfeng Wu, Giuseppe Cusmai, Acer Wei-Te Chou, Tao Wang, Bo Shen, Vijayaramalingam Periasamy, Ming-Hung Hsieh, Chun-Ying Chen, Lin He, Loke Tan, Aravind Padyana, Cheng-Hsun Yang, Gregory Unruh, Jackie Koon Lun Wong, Juo-Jung Hung, Massimo Brandolini, Sha-Ting Lin, Xi Chen, Yen Ding, Yen-Jen Ko, Young Shin, Ada Hing T. Hung, Binning Chen, Cynthia Dang, Deepak Lakshminarasimhan, Iris Hong Liu, Jerry Lin, Kowen Lai, Larry Wassermann, Ayaskant Shrivastava, Chi-Ming Hsiao, Chun-Sheng Huang, Jianlong Chen, Lakshminarasimhan Krishnan, Ning-Yi Wang, Pin-En Su, Tianwei Li, Wei-Ta Shih, Yau-Cheng Yang, Peter Cangiane, Randall Perlow, William Ngai, Hung Sen Huang, James Y. C. Chang, Xicheng Jiang, Ardie G. Venes, Ramon Gomez

Proceedings of the Symposium on VLSI Circuits, 2015