Woyu Zhang
According to our database1,
Woyu Zhang
authored at least 16 papers
between 2021 and 2024.
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Bibliography
2024
Hardware Implementation of Next Generation Reservoir Computing with RRAM-Based Hybrid Digital-Analog System.
Adv. Intell. Syst., October, 2024
Fully Binarized Graph Convolutional Network Accelerator Based on In-Memory Computing with Resistive Random-Access Memory.
Adv. Intell. Syst., July, 2024
2T2R RRAM-Based In-Memory Hyperdimensional Computing Encoder for Spatio-Temporal Signal Processing.
IEEE Trans. Circuits Syst. II Express Briefs, May, 2024
CoRR, 2024
2023
A Scalable Small-Footprint Time-Space-Pipelined Architecture for Reservoir Computing.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2023
An ADC-Less RRAM-Based Computing-in-Memory Macro With Binary CNN for Efficient Edge AI.
IEEE Trans. Circuits Syst. II Express Briefs, June, 2023
Nat. Mac. Intell., February, 2023
Random resistive memory-based deep extreme point learning machine for unified visual processing.
CoRR, 2023
Resistive memory-based zero-shot liquid state machine for multimodal event data learning.
CoRR, 2023
2022
Convolutional Echo-State Network with Random Memristors for Spatiotemporal Signal Classification.
Adv. Intell. Syst., 2022
Mixed-Precision Continual Learning Based on Computational Resistance Random Access Memory.
Adv. Intell. Syst., 2022
Few-shot graph learning with robust and energy-efficient memory-augmented graph neural network (MAGNN) based on homogeneous computing-in-memory.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
3D Reservoir Computing with High Area Efficiency (5.12 TOPS/mm<sup>2</sup>) Implemented by 3D Dynamic Memristor Array for Temporal Signal Processing.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
2021