Wooheon Kang

According to our database¹, Wooheon Kang authored at least 10 papers between 2010 and 2020.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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Bibliography

2020

Fail Memory Configuration Set for RA Estimation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2020

2016

Optimized Built-In Self-Repair for Multiple Memories.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

A New 3-D Fuse Architecture to Improve Yield of 3-D Memories.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

A Survey of Repair Analysis Algorithms for Memories.

[BibT_eX]

[DOI]

ACM Comput. Surv., 2016

2015

A 3 Dimensional Built-In Self-Repair Scheme for Yield Improvement of 3 Dimensional Memories.

[BibT_eX]

[DOI]

IEEE Trans. Reliab., 2015

Low power scan bypass technique with test data reduction.

[BibT_eX]

[DOI]

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2014

A BIRA for Memories With an Optimal Repair Rate Using Spare Memories for Area Reduction.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2014

A New Fuse Architecture and a New Post-Share Redundancy Scheme for Yield Enhancement in 3-D-Stacked Memories.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2013

A Die Selection and Matching Method with Two Stages for Yield Enhancement of 3-D Memories.

[BibT_eX]

[DOI]

Proceedings of the 22nd Asian Test Symposium, 2013

2010

EOF: Efficient Built-In Redundancy Analysis Methodology With Optimal Repair Rate.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Wooheon Kang

Timeline

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Bibliography

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