We stand with Ukraine

We stand with Ukraine

Woo-Chan Park

Orcid: 0000-0002-9249-2887

According to our database¹, Woo-Chan Park authored at least 57 papers between 1999 and 2024.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Links

Online presence:

on orcid.org

On csauthors.net:

Bibliography

2024

Efficient Haze Removal from a Single Image Using a DCP-Based Lightweight U-Net Neural Network Model.

[BibT_eX]

[DOI]

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Sensors, June, 2024

2023

An Implementation of Inverse Cosine Hardware for Sound Rendering Applications.

[BibT_eX]

[DOI]

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Cheong-Ghil Kim

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Sensors, August, 2023

Multi-Threaded Sound Propagation Algorithm to Improve Performance on Mobile Devices.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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Sensors, January, 2023

An Architecture and Implementation of Real-Time Sound Propagation Hardware for Mobile Devices.

[BibT_eX]

[DOI]

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Proceedings of the SIGGRAPH Asia 2023 Conference Papers, 2023

2022

Effective Algorithm to Control Depth Level for Performance Improvement of Sound Tracing.

[BibT_eX]

[DOI]

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Cheoung Ghil Kim

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J. Web Eng., 2022

2021

Lossless Compression Algorithm and Architecture for Reduced Memory Bandwidth Requirement with Improved Prediction Based on the Multiple DPCM Golomb-Rice Algorithm.

[BibT_eX]

[DOI]

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Cheong-Ghil Kim

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J. Web Eng., 2021

An Implementation of Multi-Chip Architecture for Real-Time Ray Tracing Based on Parallel Frame Rendering.

[BibT_eX]

[DOI]

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IEEE Access, 2021

An Effective Burst Access Scheme for Lossless Frame Buffer Compression on a Video Decoder.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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IEEE Access, 2021

2020

A Latency-Effective Pipelined Divider for Double-Precision Floating-Point Numbers.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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IEEE Access, 2020

Load Balancing Algorithm for Real-Time Ray Tracing of Dynamic Scenes.

[BibT_eX]

[DOI]

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IEEE Access, 2020

2019

A Practically Applicable Performance Prediction Model Based on Capabilities of Texture Mapping Units for Mobile GPUs.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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IEEE Access, 2019

An Effective Algorithm and Architecture for the High-Throughput Lossless Compression of High-Resolution Images.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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IEEE Access, 2019

2018

Real-time 3D Audio Downmixing System based on Sound Rendering for the Immersive Sound of Mobile Virtual Reality Applications.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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KSII Trans. Internet Inf. Syst., 2018

A Novel Performance Prediction Model for Mobile GPUs.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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IEEE Access, 2018

2017

An Effective Viewport Resolution Scaling Technique to Reduce the Power Consumption in Mobile GPUs.

[BibT_eX]

[DOI]

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Cheong Ghil Kim

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KSII Trans. Internet Inf. Syst., 2017

Real-time sound propagation hardware accelerator for immersive virtual reality 3D audio.

[BibT_eX]

[DOI]

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Proceedings of the 21st ACM SIGGRAPH Symposium on Interactive 3D Graphics and Games, 2017

2016

Geometry transition method to improve ray-tracing precision.

[BibT_eX]

[DOI]

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Multim. Tools Appl., 2016

2015

HART: A Hybrid Architecture for Ray Tracing Animated Scenes.

[BibT_eX]

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IEEE Trans. Vis. Comput. Graph., 2015

2014

RayCore: A Ray-Tracing Hardware Architecture for Mobile Devices.

[BibT_eX]

[DOI]

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ACM Trans. Graph., 2014

Effective traversal algorithms and hardware architecture for pyramidal inverse displacement mapping.

[BibT_eX]

[DOI]

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Comput. Graph., 2014

RayChip®: Real-time ray-tracing chip for embedded applications.

[BibT_eX]

[DOI]

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Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

2013

A pixel pipeline architecture with selective z-test scheme for 3D graphics processors.

[BibT_eX]

[DOI]

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Microprocess. Microsystems, 2013

gkDtree: A group-based parallel update kd-tree for interactive ray tracing.

[BibT_eX]

[DOI]

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J. Syst. Archit., 2013

Ray-Box Culling for Tree Structures.

[BibT_eX]

[DOI]

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J. Inf. Sci. Eng., 2013

Effective Fixed-Point Pipelined Divider for Mobile Rendering Processors.

[BibT_eX]

[DOI]

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IEICE Trans. Inf. Syst., 2013

Node pre-fetching architecture for real-time ray tracing.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2013

2012

Erratum: Efficient ray sorting for the tracing of incoherent rays [IEICE Electronics Express Vol.9 (2012), No 9 pp 849-854].

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2012

Efficient ray sorting for the tracing of incoherent rays.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2012

2011

T&I engine: traversal and intersection engine for hardware accelerated ray tracing.

[BibT_eX]

[DOI]

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ACM Trans. Graph., 2011

A Lossless Color Image Compression Architecture Using a Parallel Golomb-Rice Hardware CODEC.

[BibT_eX]

[DOI]

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IEEE Trans. Circuits Syst. Video Technol., 2011

An effective depth data memory system using an escape count buffer for 3D rendering processors.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2011

The design of a texture mapping unit with effective MIP-map level selection for real-time ray tracing.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2011

An effective rasterization architecture for mobile vector graphics processors.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2011

2010

The design of compressed memory system for depth data in 3D rendering processors.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2010

A high performance network-on-chip scheme using lossless data compression.

[BibT_eX]

[DOI]

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IEICE Electron. Express, 2010

2008

An Effective Load Balancing Scheme for 3D Texture-Based Sort-Last Parallel Volume Rendering on GPU Clusters.

[BibT_eX]

[DOI]

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IEICE Trans. Inf. Syst., 2008

2007

A consistency-free memory architecture for sort-last parallel rendering processors.

[BibT_eX]

[DOI]

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Cheong-Ghil Kim

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J. Syst. Archit., 2007

An Effective Bump Mapping Hardware Architecture Using Polar Coordinate System.

[BibT_eX]

[DOI]

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J. Inf. Sci. Eng., 2007

Simulation and development environment for mobile 3D graphics architectures.

[BibT_eX]

[DOI]

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IET Comput. Digit. Tech., 2007

2006

An Effective Visibility Culling Method Based on Cache Block.

[BibT_eX]

[DOI]

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Francis Neelamkavil

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IEEE Trans. Computers, 2006

A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering.

[BibT_eX]

[DOI]

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Proceedings of the Architecture of Computing Systems, 2006

2005

A pixel cache architecture with selective placement scheme based on z-test result.

[BibT_eX]

[DOI]

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Microprocess. Microsystems, 2005

A Simple and Efficient Triangle Strip Filtering Algorithm.

[BibT_eX]

[DOI]

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J. Inf. Sci. Eng., 2005

2004

A Cost-Effective Pipelined Divider with a Small Lookup Table.

[BibT_eX]

[DOI]

Jong-Chul Jeong

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IEEE Trans. Computers, 2004

A Rendering-Efficient Progressive Transmission of 3D Meshes.

[BibT_eX]

[DOI]

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Francis Neelamkavil

IEICE Trans. Inf. Syst., 2004

A Bandwidth Reduction Scheme for 3D Texture-Based Volume Rendering on Commodity Graphics Hardware.

[BibT_eX]

[DOI]

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Francis Neelamkavil

Proceedings of the Computational Science and Its Applications, 2004

A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel.

[BibT_eX]

[DOI]

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Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

Order Independent Transparency for Image Composition Parallel Rendering Machines.

[BibT_eX]

[DOI]

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Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

A Cost-Effective Supersampling for Full Scene AntiAliasing.

[BibT_eX]

[DOI]

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Proceedings of the Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, 2004

2003

An Effective Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.

[BibT_eX]

[DOI]

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IEEE Trans. Computers, 2003

An effective out-of-order execution control scheme for an embedded floating point coprocessor.

[BibT_eX]

[DOI]

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Microprocess. Microsystems, 2003

2002

Design of a Single Pass Rendering Pipeline for Occlusion Culling.

[BibT_eX]

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Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A Pipelined Tiling-Traversal Unit for High Performance 3D Rendering Processor.

[BibT_eX]

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Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2002

A New Bandwidth Reduction Method for Distributed Rendering Systems.

[BibT_eX]

[DOI]

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Proceedings of the EurAsia-ICT 2002: Information and Communication Technology, 2002

A Mid-Texturing Pixel Rasterization Pipeline Architecture for 3D Rendering Processors.

[BibT_eX]

[DOI]

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Proceedings of the 13th IEEE International Conference on Application-Specific Systems, 2002

2001

In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32.

[BibT_eX]

[DOI]

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Proceedings of the 15th IEEE Symposium on Computer Arithmetic (Arith-15 2001), 2001

1999

A floating point multiplier performing IEEE rounding and addition in parallel.

[BibT_eX]

[DOI]

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J. Syst. Archit., 1999

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