Won Lee

According to our database, Won Lee authored at least 9 papers between 1985 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

A 4-nm 1.15 TB/s HBM3 Interface With Resistor-Tuned Offset Calibration and In Situ Margin Detection.

Kwanyeob Chae, Jaegeun Song, Yoonjae Choi, Jiyeon Park, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Kyeongkeun Kang, Eunsu Kim, Juyoung Kim, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin

IEEE J. Solid State Circuits, January, 2024

2023

A 4nm 1.15TB/s HBM3 Interface with Resistor-Tuned Offset-Calibration and In-Situ Margin-Detection.

Kwanyeob Chae, Jiyeon Park, Jaegeun Song, Billy Koo, Jihun Oh, Shinyoung Yi, Won Lee, Dongha Kim, Taekyung Yeo, Kyeongkeun Kang, Sangsoo Park, Eunsu Kim, Sukhyun Jung, Sanghune Park, Sungcheol Park, Mijung Noh, Hyo-Gyuem Rhew, Jongshin Shin

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2022

Networks never rest: An investigation of network evolution in three species of animals.

Ivan Chase, Darius Coelho, Won Lee, Klaus Mueller, James P. Curley

Soc. Networks, 2022

2019

An 8nm All-Digital 7.3Gb/s/pin LPDDR5 PHY with an Approximate Delay Compensation Scheme.

Kwanyeob Chae, JongRyun Choi, Hyungkwon Lee, Jinho Choi, Shinyoung Yi, Yoonjee Nam, Sangyun Hwang, Joohyung Lee, Won Lee, Kihwan Seong, Joohee Shin, Soo-Min Lee, Seokkyun Ko, Jihun Oh, Billy Koo, Sanghune Park, Jongshin Shin, Hyungjong Ko

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2016

A 690mV 4.4Gbps/pin all-digital LPDDR4 PHY in 10nm FinFET technology.

Kwanyeob Chae, JongRyun Choi, Shinyoung Yi, Won Lee, Sanghoon Joo, Hyunhyuck Kim, Hyungkwon Yi, Yoonjee Nam, Jinho Choi, Sanghune Park, Sanghyun Lee

Proceedings of the ESSCIRC Conference 2016: 42^nd European Solid-State Circuits Conference, 2016

2013

All-digital 90° phase-shift DLL with a dithering jitter suppression scheme.

Dong-Hoon Jung, Kyungho Ryu, Jung-Hyun Park, Won Lee, Seong-Ook Jung

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface.

Heechai Kang, Kyungho Ryu, Dong-Hoon Jung, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2010

Process variation tolerant all-digital multiphase DLL for DDR3 interface.

Heechai Kang, Kyungho Ryu, Donghwan Lee, Won Lee, SuHo Kim, JongRyun Choi, Seong-Ook Jung

Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

1985

A QNAR-AGC estimator with reduced arithmetic complexity.

Won Lee, Kyu Park, Song Park

IEEE Trans. Acoust. Speech Signal Process., 1985