Wolfgang Schlecker
According to our database1,
Wolfgang Schlecker
authored at least 8 papers
between 2002 and 2016.
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Bibliography
2016
Digitally Enhanced Wideband I/Q Downconversion Receiver With 2-Channel Time-Interleaved ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2016
2015
Frequency Response Mismatch Analysis in Time-Interleaved Analog I/Q Processing and ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2015
Frequency Response Mismatches in 4-channel Time-Interleaved ADCs: Analysis, Blind Identification, and Correction.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
Low-complexity digital correction of 4-channel time-interleaved ADC frequency response mismatch using adaptive I/Q signal processing.
Proceedings of the 2015 IEEE Global Conference on Signal and Information Processing, 2015
Digital full-band linearization of wideband direct-conversion receiver for radar and communications applications.
Proceedings of the 49th Asilomar Conference on Signals, Systems and Computers, 2015
2014
Iterative FPGA Implementation Easing Safety Certification for Mixed-Criticality Embedded Real-Time Systems.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2005
Proceedings of the New Trends and Technologies in Computer-Aided Learning for Computer-Aided Design, 2005
2002
Hardware Implementation of a Multiuser Detection Scheme Based on Recurrent Neural Networks.
Proceedings of the Field-Programmable Logic and Applications, 2002